KMAC/UNMASKED Simulation Results

Tuesday October 14 2025 16:09:07 UTC

GitHub Revision: 0fc384d

Branch: master

Testplan

Simulator: VCS

Test Results

Stage Name Tests Max Job Runtime Simulated Time Passing Total Pass Rate
V1 smoke kmac_smoke 5.450s 1.618ms 1 1 100.00
V1 csr_hw_reset kmac_csr_hw_reset 1.020s 52.400us 1 1 100.00
V1 csr_rw kmac_csr_rw 1.020s 17.885us 1 1 100.00
V1 csr_bit_bash kmac_csr_bit_bash 12.410s 1.937ms 1 1 100.00
V1 csr_aliasing kmac_csr_aliasing 6.570s 1.811ms 1 1 100.00
V1 csr_mem_rw_with_rand_reset kmac_csr_mem_rw_with_rand_reset 1.940s 59.326us 1 1 100.00
V1 regwen_csr_and_corresponding_lockable_csr kmac_csr_rw 1.020s 17.885us 1 1 100.00
kmac_csr_aliasing 6.570s 1.811ms 1 1 100.00
V1 mem_walk kmac_mem_walk 0.700s 32.568us 1 1 100.00
V1 mem_partial_access kmac_mem_partial_access 1.210s 74.979us 1 1 100.00
V1 TOTAL 8 8 100.00
V2 long_msg_and_output kmac_long_msg_and_output 26.434m 384.309ms 1 1 100.00
V2 burst_write kmac_burst_write 3.521m 6.554ms 1 1 100.00
V2 test_vectors kmac_test_vectors_sha3_224 25.932m 64.542ms 1 1 100.00
kmac_test_vectors_sha3_256 18.616m 72.820ms 1 1 100.00
kmac_test_vectors_sha3_384 20.726m 634.130ms 1 1 100.00
kmac_test_vectors_sha3_512 9.720m 18.993ms 1 1 100.00
kmac_test_vectors_shake_128 34.528m 113.305ms 1 1 100.00
kmac_test_vectors_shake_256 5.022m 101.717ms 1 1 100.00
kmac_test_vectors_kmac 1.820s 93.478us 1 1 100.00
kmac_test_vectors_kmac_xof 1.750s 297.051us 1 1 100.00
V2 sideload kmac_sideload 2.236m 2.427ms 1 1 100.00
V2 app kmac_app 3.204m 15.848ms 1 1 100.00
V2 app_with_partial_data kmac_app_with_partial_data 2.075m 4.804ms 1 1 100.00
V2 entropy_refresh kmac_entropy_refresh 2.488m 16.109ms 1 1 100.00
V2 error kmac_error 1.403m 5.856ms 1 1 100.00
V2 key_error kmac_key_error 1.650s 852.729us 1 1 100.00
V2 sideload_invalid kmac_sideload_invalid 1.740s 35.511us 1 1 100.00
V2 edn_timeout_error kmac_edn_timeout_error 18.290s 3.656ms 1 1 100.00
V2 entropy_mode_error kmac_entropy_mode_error 3.520s 59.706us 1 1 100.00
V2 entropy_ready_error kmac_entropy_ready_error 30.900s 19.299ms 1 1 100.00
V2 lc_escalation kmac_lc_escalation 1.160s 40.770us 1 1 100.00
V2 stress_all kmac_stress_all 4.939m 9.304ms 1 1 100.00
V2 intr_test kmac_intr_test 0.660s 13.284us 1 1 100.00
V2 alert_test kmac_alert_test 1.010s 88.121us 1 1 100.00
V2 tl_d_oob_addr_access kmac_tl_errors 2.120s 448.512us 1 1 100.00
V2 tl_d_illegal_access kmac_tl_errors 2.120s 448.512us 1 1 100.00
V2 tl_d_outstanding_access kmac_csr_hw_reset 1.020s 52.400us 1 1 100.00
kmac_csr_rw 1.020s 17.885us 1 1 100.00
kmac_csr_aliasing 6.570s 1.811ms 1 1 100.00
kmac_same_csr_outstanding 1.780s 38.777us 1 1 100.00
V2 tl_d_partial_access kmac_csr_hw_reset 1.020s 52.400us 1 1 100.00
kmac_csr_rw 1.020s 17.885us 1 1 100.00
kmac_csr_aliasing 6.570s 1.811ms 1 1 100.00
kmac_same_csr_outstanding 1.780s 38.777us 1 1 100.00
V2 TOTAL 26 26 100.00
V2S shadow_reg_update_error kmac_shadow_reg_errors 1.400s 42.375us 1 1 100.00
V2S shadow_reg_read_clear_staged_value kmac_shadow_reg_errors 1.400s 42.375us 1 1 100.00
V2S shadow_reg_storage_error kmac_shadow_reg_errors 1.400s 42.375us 1 1 100.00
V2S shadowed_reset_glitch kmac_shadow_reg_errors 1.400s 42.375us 1 1 100.00
V2S shadow_reg_update_error_with_csr_rw kmac_shadow_reg_errors_with_csr_rw 2.930s 98.106us 1 1 100.00
V2S tl_intg_err kmac_sec_cm 56.910s 24.468ms 1 1 100.00
kmac_tl_intg_err 3.710s 1.597ms 1 1 100.00
V2S sec_cm_bus_integrity kmac_tl_intg_err 3.710s 1.597ms 1 1 100.00
V2S sec_cm_lc_escalate_en_intersig_mubi kmac_lc_escalation 1.160s 40.770us 1 1 100.00
V2S sec_cm_sw_key_key_masking kmac_smoke 5.450s 1.618ms 1 1 100.00
V2S sec_cm_key_sideload kmac_sideload 2.236m 2.427ms 1 1 100.00
V2S sec_cm_cfg_shadowed_config_shadow kmac_shadow_reg_errors 1.400s 42.375us 1 1 100.00
V2S sec_cm_fsm_sparse kmac_sec_cm 56.910s 24.468ms 1 1 100.00
V2S sec_cm_ctr_redun kmac_sec_cm 56.910s 24.468ms 1 1 100.00
V2S sec_cm_packer_ctr_redun kmac_sec_cm 56.910s 24.468ms 1 1 100.00
V2S sec_cm_cfg_shadowed_config_regwen kmac_smoke 5.450s 1.618ms 1 1 100.00
V2S sec_cm_fsm_global_esc kmac_lc_escalation 1.160s 40.770us 1 1 100.00
V2S sec_cm_fsm_local_esc kmac_sec_cm 56.910s 24.468ms 1 1 100.00
V2S sec_cm_absorbed_ctrl_mubi kmac_mubi 1.660m 5.957ms 1 1 100.00
V2S sec_cm_sw_cmd_ctrl_sparse kmac_smoke 5.450s 1.618ms 1 1 100.00
V2S TOTAL 5 5 100.00
V3 stress_all_with_rand_reset kmac_stress_all_with_rand_reset 59.350s 3.070ms 1 1 100.00
V3 TOTAL 1 1 100.00
TOTAL 40 40 100.00