| V1 |
smoke |
kmac_smoke |
21.970s |
3.874ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.810s |
17.512us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.890s |
24.864us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
10.310s |
4.706ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.850s |
920.156us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.350s |
195.549us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.890s |
24.864us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.850s |
920.156us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.660s |
13.450us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.130s |
45.622us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
57.940s |
932.393us |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
3.841m |
8.347ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
19.633m |
17.546ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
18.361m |
32.896ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
23.420s |
5.207ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
10.240s |
280.270us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
1.657m |
8.953ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
1.584m |
23.222ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.110s |
110.423us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.490s |
312.132us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
3.790s |
400.671us |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
20.830s |
497.896us |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
3.520m |
33.139ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
17.260s |
2.705ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.606m |
12.575ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
4.060s |
8.475ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
1.950s |
629.493us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
17.680s |
897.983us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
27.360s |
2.622ms |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
53.820s |
8.852ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.020s |
61.961us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
4.877m |
221.851ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.880s |
31.634us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.840s |
80.850us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.560s |
74.349us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.560s |
74.349us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.810s |
17.512us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.890s |
24.864us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.850s |
920.156us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.310s |
56.253us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.810s |
17.512us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.890s |
24.864us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.850s |
920.156us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.310s |
56.253us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.290s |
461.313us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.290s |
461.313us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.290s |
461.313us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.290s |
461.313us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.000s |
303.858us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
39.960s |
6.444ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.940s |
430.192us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.940s |
430.192us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.020s |
61.961us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
21.970s |
3.874ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
3.790s |
400.671us |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.290s |
461.313us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
39.960s |
6.444ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
39.960s |
6.444ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
39.960s |
6.444ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
21.970s |
3.874ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.020s |
61.961us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
39.960s |
6.444ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.386m |
11.099ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
21.970s |
3.874ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
2.118m |
17.139ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |