| V1 |
smoke |
aon_timer_smoke |
0.870s |
564.031us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.830s |
765.993us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.720s |
437.956us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
2.200s |
6.207ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.130s |
429.325us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.100s |
439.416us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.720s |
437.956us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.130s |
429.325us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
1.150s |
474.169us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.010s |
436.736us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
0.990s |
693.904us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
0.810s |
769.739us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
3.930s |
18.205ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.250s |
293.113us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
1.140s |
509.406us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.420s |
503.788us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.420s |
503.788us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.830s |
765.993us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.720s |
437.956us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.130s |
429.325us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.230s |
2.429ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.830s |
765.993us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.720s |
437.956us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.130s |
429.325us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
3.230s |
2.429ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
9.290s |
7.925ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
9.150s |
7.972ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
9.150s |
7.972ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.060s |
602.871us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.970s |
691.391us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.220s |
3.830ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.320s |
555.770us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
11.260s |
4.187ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
22.240s |
4.389ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |