| V1 |
smoke |
kmac_smoke |
37.760s |
5.541ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.850s |
25.947us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.820s |
20.631us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
10.010s |
577.338us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
3.320s |
206.915us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.750s |
75.010us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.820s |
20.631us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.320s |
206.915us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.710s |
35.326us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.090s |
36.153us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
43.628m |
138.139ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
3.991m |
7.284ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
25.566m |
428.922ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
20.400s |
609.252us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
18.080s |
1.167ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
11.230s |
4.930ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.155m |
26.346ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
4.201m |
32.079ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
1.700s |
241.265us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
1.940s |
89.862us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
2.269m |
31.930ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
16.080s |
767.697us |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
54.730s |
9.143ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
2.555m |
6.630ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
2.145m |
2.852ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
4.710s |
1.450ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
3.080s |
178.524us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
16.740s |
1.289ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
5.030s |
605.299us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
6.170s |
4.425ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.000s |
48.468us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
11.276m |
63.688ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.720s |
30.175us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.700s |
58.645us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.680s |
76.102us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.680s |
76.102us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.850s |
25.947us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.820s |
20.631us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.320s |
206.915us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.630s |
72.073us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.850s |
25.947us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.820s |
20.631us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
3.320s |
206.915us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.630s |
72.073us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.010s |
26.679us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.010s |
26.679us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.010s |
26.679us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.010s |
26.679us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.140s |
191.536us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
39.480s |
16.593ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.050s |
145.617us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.050s |
145.617us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.000s |
48.468us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
37.760s |
5.541ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
2.269m |
31.930ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.010s |
26.679us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
39.480s |
16.593ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
39.480s |
16.593ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
39.480s |
16.593ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
37.760s |
5.541ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.000s |
48.468us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
39.480s |
16.593ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.942m |
11.636ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
37.760s |
5.541ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.682m |
2.062ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |