| V1 |
smoke |
kmac_smoke |
9.910s |
403.088us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.780s |
23.536us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.940s |
40.417us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
12.820s |
1.305ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
2.830s |
156.904us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.880s |
43.655us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.940s |
40.417us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
2.830s |
156.904us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.640s |
30.269us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.270s |
210.386us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
29.994m |
63.322ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
1.549m |
7.843ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
19.726m |
63.780ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
28.790s |
11.421ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
13.482m |
54.818ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
11.100s |
1.084ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.276m |
162.272ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
3.533m |
5.652ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
1.750s |
118.468us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
1.690s |
179.329us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
1.141m |
26.691ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
2.221m |
43.758ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
22.070s |
4.200ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
18.100s |
2.950ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.157m |
5.304ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
2.430s |
2.073ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
1.080s |
39.546us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
12.520s |
886.517us |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
6.340s |
137.407us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
35.020s |
6.366ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
0.990s |
26.214us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
13.099m |
44.349ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.650s |
40.223us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.710s |
38.989us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.430s |
228.550us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.430s |
228.550us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.780s |
23.536us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.940s |
40.417us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
2.830s |
156.904us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.750s |
87.605us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.780s |
23.536us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.940s |
40.417us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
2.830s |
156.904us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.750s |
87.605us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.530s |
136.598us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.530s |
136.598us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.530s |
136.598us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.530s |
136.598us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.590s |
1.171ms |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
19.000s |
5.978ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
1.720s |
284.475us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
1.720s |
284.475us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
0.990s |
26.214us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
9.910s |
403.088us |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
1.141m |
26.691ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.530s |
136.598us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
19.000s |
5.978ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
19.000s |
5.978ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
19.000s |
5.978ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
9.910s |
403.088us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
0.990s |
26.214us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
19.000s |
5.978ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
2.623m |
17.071ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
9.910s |
403.088us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
1.590m |
7.524ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |