| V1 |
smoke |
aon_timer_smoke |
1.700s |
707.588us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
2.030s |
1.134ms |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.380s |
455.122us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
5.720s |
4.279ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.520s |
658.134us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
0.770s |
421.160us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.380s |
455.122us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.520s |
658.134us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.680s |
479.199us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
1.280s |
472.237us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
4.430s |
2.953ms |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
0.980s |
646.141us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
15.480s |
45.535ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
0.680s |
302.074us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.740s |
385.305us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.460s |
720.616us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.460s |
720.616us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
2.030s |
1.134ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.380s |
455.122us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.520s |
658.134us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.060s |
2.517ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
2.030s |
1.134ms |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.380s |
455.122us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.520s |
658.134us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
2.060s |
2.517ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
5.720s |
4.127ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
5.700s |
4.549ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
5.700s |
4.549ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.840s |
610.844us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.690s |
640.198us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
1.680s |
3.554ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
0.720s |
654.906us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
11.530s |
4.158ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
22.270s |
14.628ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |