| V1 |
smoke |
aon_timer_smoke |
1.440s |
540.062us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
0.850s |
669.076us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
1.300s |
450.006us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
3.500s |
7.270ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
1.500s |
388.524us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.140s |
438.677us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
1.300s |
450.006us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.500s |
388.524us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.620s |
425.041us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.970s |
366.647us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
0.880s |
674.281us |
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
1.080s |
631.222us |
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
1.639m |
94.909ms |
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.180s |
461.825us |
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.760s |
505.613us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
2.890s |
1.007ms |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
2.890s |
1.007ms |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
0.850s |
669.076us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.300s |
450.006us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.500s |
388.524us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.320s |
2.369ms |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
0.850s |
669.076us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
1.300s |
450.006us |
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
1.500s |
388.524us |
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
1.320s |
2.369ms |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
2.340s |
8.116ms |
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
5.080s |
4.083ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
5.080s |
4.083ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
0.920s |
547.907us |
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.750s |
512.974us |
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
2.360s |
3.725ms |
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.270s |
696.699us |
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
4.860s |
4.265ms |
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
13.550s |
8.669ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |