| V1 |
smoke |
kmac_smoke |
10.410s |
573.253us |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.910s |
126.598us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.840s |
112.696us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
6.510s |
488.557us |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
6.300s |
2.084ms |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.230s |
79.199us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.840s |
112.696us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.300s |
2.084ms |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
0.680s |
14.812us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.100s |
36.517us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
3.394m |
25.105ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
7.590m |
27.512ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
22.940s |
651.920us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
35.600s |
38.659ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
18.407m |
98.025ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
12.954m |
125.659ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
2.384m |
43.348ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
3.940m |
64.568ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
1.490s |
110.628us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
1.710s |
37.870us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
3.440m |
3.949ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
52.050s |
7.496ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
2.143m |
7.977ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
2.309m |
13.218ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
2.790m |
47.612ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
2.840s |
2.856ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
3.360s |
491.564us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
6.030s |
6.579ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
22.500s |
8.059ms |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
18.280s |
19.564ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.180s |
28.650us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
11.250s |
12.350ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.670s |
56.186us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.680s |
41.051us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
2.220s |
121.469us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
2.220s |
121.469us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.910s |
126.598us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.840s |
112.696us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.300s |
2.084ms |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.560s |
38.232us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.910s |
126.598us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.840s |
112.696us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
6.300s |
2.084ms |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.560s |
38.232us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.400s |
627.780us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.400s |
627.780us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.400s |
627.780us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.400s |
627.780us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
3.400s |
237.810us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
43.530s |
5.154ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
1.920s |
124.981us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
1.920s |
124.981us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.180s |
28.650us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
10.410s |
573.253us |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
3.440m |
3.949ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.400s |
627.780us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
43.530s |
5.154ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
43.530s |
5.154ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
43.530s |
5.154ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
10.410s |
573.253us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.180s |
28.650us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
43.530s |
5.154ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.151m |
3.527ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
10.410s |
573.253us |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
46.630s |
5.460ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |