cb622e0| Stage | Name | Tests | Max Job Runtime | Simulated Time | Passing | Total | Pass Rate |
|---|---|---|---|---|---|---|---|
| V1 | mbx_smoke | mbx_smoke | 33.000s | 5.173ms | 1 | 1 | 100.00 |
| V1 | csr_hw_reset | mbx_csr_hw_reset | 1.000s | 56.207us | 1 | 1 | 100.00 |
| V1 | csr_rw | mbx_csr_rw | 1.000s | 42.444us | 1 | 1 | 100.00 |
| V1 | csr_bit_bash | mbx_csr_bit_bash | 3.000s | 624.433us | 1 | 1 | 100.00 |
| V1 | csr_aliasing | mbx_csr_aliasing | 2.000s | 44.520us | 1 | 1 | 100.00 |
| V1 | csr_mem_rw_with_rand_reset | mbx_csr_mem_rw_with_rand_reset | 2.000s | 43.543us | 1 | 1 | 100.00 |
| V1 | regwen_csr_and_corresponding_lockable_csr | mbx_csr_rw | 1.000s | 42.444us | 1 | 1 | 100.00 |
| mbx_csr_aliasing | 2.000s | 44.520us | 1 | 1 | 100.00 | ||
| V1 | TOTAL | 6 | 6 | 100.00 | |||
| V2 | mbx_stress | mbx_stress | 13.000s | 3.372ms | 0 | 1 | 0.00 |
| V2 | mbx_max_activity | mbx_stress_zero_delays | 39.000s | 1.827ms | 1 | 1 | 100.00 |
| V2 | mbx_imbx_oob | mbx_imbx_oob | 8.000s | 165.778us | 0 | 1 | 0.00 |
| V2 | mbx_doe_intr_msg | mbx_doe_intr_msg | 20.000s | 2.135ms | 1 | 1 | 100.00 |
| V2 | alert_test | mbx_alert_test | 3.000s | 16.667us | 1 | 1 | 100.00 |
| V2 | intr_test | mbx_intr_test | 2.000s | 56.458us | 1 | 1 | 100.00 |
| V2 | tl_d_oob_addr_access | mbx_tl_errors | 2.000s | 101.601us | 1 | 1 | 100.00 |
| V2 | tl_d_illegal_access | mbx_tl_errors | 2.000s | 101.601us | 1 | 1 | 100.00 |
| V2 | tl_d_outstanding_access | mbx_csr_hw_reset | 1.000s | 56.207us | 1 | 1 | 100.00 |
| mbx_csr_rw | 1.000s | 42.444us | 1 | 1 | 100.00 | ||
| mbx_csr_aliasing | 2.000s | 44.520us | 1 | 1 | 100.00 | ||
| mbx_same_csr_outstanding | 2.000s | 94.702us | 1 | 1 | 100.00 | ||
| V2 | tl_d_partial_access | mbx_csr_hw_reset | 1.000s | 56.207us | 1 | 1 | 100.00 |
| mbx_csr_rw | 1.000s | 42.444us | 1 | 1 | 100.00 | ||
| mbx_csr_aliasing | 2.000s | 44.520us | 1 | 1 | 100.00 | ||
| mbx_same_csr_outstanding | 2.000s | 94.702us | 1 | 1 | 100.00 | ||
| V2 | TOTAL | 6 | 8 | 75.00 | |||
| V2S | tl_intg_err | mbx_tl_intg_err | 2.000s | 492.055us | 1 | 1 | 100.00 |
| mbx_sec_cm | 3.000s | 12.083us | 1 | 1 | 100.00 | ||
| V2S | TOTAL | 2 | 2 | 100.00 | |||
| TOTAL | 14 | 16 | 87.50 |
UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register has 2 failures:
Test mbx_stress has 1 failures.
0.mbx_stress.88092234512260831819651451575398710155864653693716217253098354741527049902487
Line 173, in log /nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress/latest/run.log
UVM_ERROR @ 3371854866 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
UVM_INFO @ 3371854866 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
Test mbx_imbx_oob has 1 failures.
0.mbx_imbx_oob.56378142639637415958454950307887455776937299060861033936917504501285822785161
Line 95, in log /nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_imbx_oob/latest/run.log
UVM_ERROR @ 165777805 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
UVM_INFO @ 165777805 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---