| V1 |
smoke |
kmac_smoke |
57.610s |
4.018ms |
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
kmac_csr_hw_reset |
0.990s |
63.944us |
1 |
1 |
100.00 |
| V1 |
csr_rw |
kmac_csr_rw |
0.840s |
43.519us |
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
kmac_csr_bit_bash |
7.340s |
3.045ms |
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
kmac_csr_aliasing |
5.320s |
143.772us |
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
kmac_csr_mem_rw_with_rand_reset |
1.810s |
45.398us |
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
kmac_csr_rw |
0.840s |
43.519us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
5.320s |
143.772us |
1 |
1 |
100.00 |
| V1 |
mem_walk |
kmac_mem_walk |
1.000s |
17.687us |
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
kmac_mem_partial_access |
1.380s |
125.894us |
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
long_msg_and_output |
kmac_long_msg_and_output |
37.948m |
31.484ms |
1 |
1 |
100.00 |
| V2 |
burst_write |
kmac_burst_write |
6.551m |
10.562ms |
1 |
1 |
100.00 |
| V2 |
test_vectors |
kmac_test_vectors_sha3_224 |
34.140s |
1.229ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_256 |
37.220s |
5.295ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_384 |
22.579m |
53.381ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_sha3_512 |
18.935m |
188.996ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_128 |
3.320m |
18.271ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_shake_256 |
5.208m |
38.606ms |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac |
2.580s |
513.370us |
1 |
1 |
100.00 |
|
|
kmac_test_vectors_kmac_xof |
2.720s |
581.100us |
1 |
1 |
100.00 |
| V2 |
sideload |
kmac_sideload |
6.055m |
66.303ms |
1 |
1 |
100.00 |
| V2 |
app |
kmac_app |
3.394m |
17.095ms |
1 |
1 |
100.00 |
| V2 |
app_with_partial_data |
kmac_app_with_partial_data |
2.082m |
31.219ms |
1 |
1 |
100.00 |
| V2 |
entropy_refresh |
kmac_entropy_refresh |
4.453m |
13.906ms |
1 |
1 |
100.00 |
| V2 |
error |
kmac_error |
1.632m |
1.656ms |
1 |
1 |
100.00 |
| V2 |
key_error |
kmac_key_error |
3.990s |
2.866ms |
1 |
1 |
100.00 |
| V2 |
sideload_invalid |
kmac_sideload_invalid |
4.950s |
96.076us |
1 |
1 |
100.00 |
| V2 |
edn_timeout_error |
kmac_edn_timeout_error |
22.590s |
4.178ms |
1 |
1 |
100.00 |
| V2 |
entropy_mode_error |
kmac_entropy_mode_error |
1.580s |
102.493us |
1 |
1 |
100.00 |
| V2 |
entropy_ready_error |
kmac_entropy_ready_error |
56.910s |
6.183ms |
1 |
1 |
100.00 |
| V2 |
lc_escalation |
kmac_lc_escalation |
1.910s |
222.038us |
1 |
1 |
100.00 |
| V2 |
stress_all |
kmac_stress_all |
3.647m |
12.192ms |
1 |
1 |
100.00 |
| V2 |
intr_test |
kmac_intr_test |
0.960s |
20.257us |
1 |
1 |
100.00 |
| V2 |
alert_test |
kmac_alert_test |
0.990s |
57.330us |
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
kmac_tl_errors |
1.760s |
184.014us |
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
kmac_tl_errors |
1.760s |
184.014us |
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
kmac_csr_hw_reset |
0.990s |
63.944us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.840s |
43.519us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
5.320s |
143.772us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.360s |
49.665us |
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
kmac_csr_hw_reset |
0.990s |
63.944us |
1 |
1 |
100.00 |
|
|
kmac_csr_rw |
0.840s |
43.519us |
1 |
1 |
100.00 |
|
|
kmac_csr_aliasing |
5.320s |
143.772us |
1 |
1 |
100.00 |
|
|
kmac_same_csr_outstanding |
1.360s |
49.665us |
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
26 |
26 |
100.00 |
| V2S |
shadow_reg_update_error |
kmac_shadow_reg_errors |
1.990s |
70.245us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_read_clear_staged_value |
kmac_shadow_reg_errors |
1.990s |
70.245us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_storage_error |
kmac_shadow_reg_errors |
1.990s |
70.245us |
1 |
1 |
100.00 |
| V2S |
shadowed_reset_glitch |
kmac_shadow_reg_errors |
1.990s |
70.245us |
1 |
1 |
100.00 |
| V2S |
shadow_reg_update_error_with_csr_rw |
kmac_shadow_reg_errors_with_csr_rw |
2.410s |
72.487us |
1 |
1 |
100.00 |
| V2S |
tl_intg_err |
kmac_sec_cm |
44.320s |
4.750ms |
1 |
1 |
100.00 |
|
|
kmac_tl_intg_err |
2.930s |
184.826us |
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
kmac_tl_intg_err |
2.930s |
184.826us |
1 |
1 |
100.00 |
| V2S |
sec_cm_lc_escalate_en_intersig_mubi |
kmac_lc_escalation |
1.910s |
222.038us |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_key_key_masking |
kmac_smoke |
57.610s |
4.018ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_key_sideload |
kmac_sideload |
6.055m |
66.303ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_shadow |
kmac_shadow_reg_errors |
1.990s |
70.245us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_sparse |
kmac_sec_cm |
44.320s |
4.750ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_ctr_redun |
kmac_sec_cm |
44.320s |
4.750ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_packer_ctr_redun |
kmac_sec_cm |
44.320s |
4.750ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_cfg_shadowed_config_regwen |
kmac_smoke |
57.610s |
4.018ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_global_esc |
kmac_lc_escalation |
1.910s |
222.038us |
1 |
1 |
100.00 |
| V2S |
sec_cm_fsm_local_esc |
kmac_sec_cm |
44.320s |
4.750ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_absorbed_ctrl_mubi |
kmac_mubi |
1.647m |
8.386ms |
1 |
1 |
100.00 |
| V2S |
sec_cm_sw_cmd_ctrl_sparse |
kmac_smoke |
57.610s |
4.018ms |
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
5 |
5 |
100.00 |
| V3 |
stress_all_with_rand_reset |
kmac_stress_all_with_rand_reset |
57.030s |
3.083ms |
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
1 |
1 |
100.00 |
|
|
TOTAL |
|
|
40 |
40 |
100.00 |