MBX Simulation Results

Tuesday November 04 2025 16:01:43 UTC

GitHub Revision: 80590e0

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	mbx_smoke	mbx_smoke	36.000s	7.583ms	1	1	100.00
V1	csr_hw_reset	mbx_csr_hw_reset	1.000s	58.419us	1	1	100.00
V1	csr_rw	mbx_csr_rw	2.000s	40.322us	1	1	100.00
V1	csr_bit_bash	mbx_csr_bit_bash	2.000s	44.037us	1	1	100.00
V1	csr_aliasing	mbx_csr_aliasing	2.000s	51.145us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	mbx_csr_mem_rw_with_rand_reset	3.000s	155.302us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	mbx_csr_rw	2.000s	40.322us	1	1	100.00
		mbx_csr_aliasing	2.000s	51.145us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	mbx_stress	mbx_stress	5.000s	296.129us	0	1	0.00
V2	mbx_max_activity	mbx_stress_zero_delays	3.000s	102.197us	0	1	0.00
V2	mbx_imbx_oob	mbx_imbx_oob	31.000s	3.491ms	1	1	100.00
V2	mbx_doe_intr_msg	mbx_doe_intr_msg	10.000s	1.572ms	1	1	100.00
V2	alert_test	mbx_alert_test	1.000s	33.807us	1	1	100.00
V2	intr_test	mbx_intr_test	1.000s	18.903us	1	1	100.00
V2	tl_d_oob_addr_access	mbx_tl_errors	3.000s	146.256us	1	1	100.00
V2	tl_d_illegal_access	mbx_tl_errors	3.000s	146.256us	1	1	100.00
V2	tl_d_outstanding_access	mbx_csr_hw_reset	1.000s	58.419us	1	1	100.00
		mbx_csr_rw	2.000s	40.322us	1	1	100.00
		mbx_csr_aliasing	2.000s	51.145us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	18.019us	1	1	100.00
V2	tl_d_partial_access	mbx_csr_hw_reset	1.000s	58.419us	1	1	100.00
		mbx_csr_rw	2.000s	40.322us	1	1	100.00
		mbx_csr_aliasing	2.000s	51.145us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	18.019us	1	1	100.00
V2		TOTAL			6	8	75.00
V2S	tl_intg_err	mbx_tl_intg_err	2.000s	325.608us	1	1	100.00
		mbx_sec_cm	1.000s	36.617us	1	1	100.00
V2S		TOTAL			2	2	100.00
		TOTAL			14	16	87.50

Failure Buckets

• UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register has 2 failures:

  • Test mbx_stress has 1 failures.

    • 0.mbx_stress.91198098729719911160502919526691591373906547971646919761971925535891926068278
      Line 258, in log /nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress/latest/run.log

        UVM_ERROR @ 296128848 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
        UVM_INFO @ 296128848 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

  • Test mbx_stress_zero_delays has 1 failures.

    • 0.mbx_stress_zero_delays.75048341536579709040405586579961433467746253688412525139229132084105601119174
      Line 95, in log /nightly/current_run/scratch/master/mbx-sim-xcelium/0.mbx_stress_zero_delays/latest/run.log

        UVM_ERROR @ 102196600 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
        UVM_INFO @ 102196600 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---