KMAC/UNMASKED Simulation Results

Wednesday November 05 2025 16:07:17 UTC

GitHub Revision: 9baed2b

Branch: master

Testplan

Simulator: VCS

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	kmac_smoke	17.260s	5.747ms	1	1	100.00
V1	csr_hw_reset	kmac_csr_hw_reset	1.040s	48.049us	1	1	100.00
V1	csr_rw	kmac_csr_rw	0.920s	40.241us	1	1	100.00
V1	csr_bit_bash	kmac_csr_bit_bash	5.570s	387.038us	1	1	100.00
V1	csr_aliasing	kmac_csr_aliasing	3.460s	1.363ms	1	1	100.00
V1	csr_mem_rw_with_rand_reset	kmac_csr_mem_rw_with_rand_reset	1.570s	48.822us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	kmac_csr_rw	0.920s	40.241us	1	1	100.00
		kmac_csr_aliasing	3.460s	1.363ms	1	1	100.00
V1	mem_walk	kmac_mem_walk	0.990s	32.272us	1	1	100.00
V1	mem_partial_access	kmac_mem_partial_access	1.230s	454.054us	1	1	100.00
V1		TOTAL			8	8	100.00
V2	long_msg_and_output	kmac_long_msg_and_output	22.713m	546.981ms	1	1	100.00
V2	burst_write	kmac_burst_write	31.070s	1.633ms	1	1	100.00
V2	test_vectors	kmac_test_vectors_sha3_224	24.220s	1.248ms	1	1	100.00
		kmac_test_vectors_sha3_256	32.400s	2.498ms	1	1	100.00
		kmac_test_vectors_sha3_384	21.591m	309.759ms	1	1	100.00
		kmac_test_vectors_sha3_512	14.450s	14.392ms	1	1	100.00
		kmac_test_vectors_shake_128	2.377m	41.066ms	1	1	100.00
		kmac_test_vectors_shake_256	24.683m	261.788ms	1	1	100.00
		kmac_test_vectors_kmac	1.840s	217.080us	1	1	100.00
		kmac_test_vectors_kmac_xof	1.730s	154.495us	1	1	100.00
V2	sideload	kmac_sideload	3.690m	58.295ms	1	1	100.00
V2	app	kmac_app	2.264m	4.615ms	1	1	100.00
V2	app_with_partial_data	kmac_app_with_partial_data	2.108m	18.659ms	1	1	100.00
V2	entropy_refresh	kmac_entropy_refresh	2.530m	9.620ms	1	1	100.00
V2	error	kmac_error	2.123m	4.544ms	1	1	100.00
V2	key_error	kmac_key_error	6.370s	1.657ms	1	1	100.00
V2	sideload_invalid	kmac_sideload_invalid	27.820s	10.826ms	0	1	0.00
V2	edn_timeout_error	kmac_edn_timeout_error	28.480s	8.266ms	1	1	100.00
V2	entropy_mode_error	kmac_entropy_mode_error	12.020s	216.853us	1	1	100.00
V2	entropy_ready_error	kmac_entropy_ready_error	34.980s	23.679ms	1	1	100.00
V2	lc_escalation	kmac_lc_escalation	22.260s	1.230ms	1	1	100.00
V2	stress_all	kmac_stress_all	4.385m	11.203ms	1	1	100.00
V2	intr_test	kmac_intr_test	0.880s	16.660us	1	1	100.00
V2	alert_test	kmac_alert_test	1.080s	44.428us	1	1	100.00
V2	tl_d_oob_addr_access	kmac_tl_errors	3.030s	2.497ms	1	1	100.00
V2	tl_d_illegal_access	kmac_tl_errors	3.030s	2.497ms	1	1	100.00
V2	tl_d_outstanding_access	kmac_csr_hw_reset	1.040s	48.049us	1	1	100.00
		kmac_csr_rw	0.920s	40.241us	1	1	100.00
		kmac_csr_aliasing	3.460s	1.363ms	1	1	100.00
		kmac_same_csr_outstanding	1.740s	73.022us	1	1	100.00
V2	tl_d_partial_access	kmac_csr_hw_reset	1.040s	48.049us	1	1	100.00
		kmac_csr_rw	0.920s	40.241us	1	1	100.00
		kmac_csr_aliasing	3.460s	1.363ms	1	1	100.00
		kmac_same_csr_outstanding	1.740s	73.022us	1	1	100.00
V2		TOTAL			25	26	96.15
V2S	shadow_reg_update_error	kmac_shadow_reg_errors	1.420s	35.084us	1	1	100.00
V2S	shadow_reg_read_clear_staged_value	kmac_shadow_reg_errors	1.420s	35.084us	1	1	100.00
V2S	shadow_reg_storage_error	kmac_shadow_reg_errors	1.420s	35.084us	1	1	100.00
V2S	shadowed_reset_glitch	kmac_shadow_reg_errors	1.420s	35.084us	1	1	100.00
V2S	shadow_reg_update_error_with_csr_rw	kmac_shadow_reg_errors_with_csr_rw	3.420s	175.192us	1	1	100.00
V2S	tl_intg_err	kmac_sec_cm	31.980s	5.703ms	1	1	100.00
		kmac_tl_intg_err	3.010s	382.000us	1	1	100.00
V2S	sec_cm_bus_integrity	kmac_tl_intg_err	3.010s	382.000us	1	1	100.00
V2S	sec_cm_lc_escalate_en_intersig_mubi	kmac_lc_escalation	22.260s	1.230ms	1	1	100.00
V2S	sec_cm_sw_key_key_masking	kmac_smoke	17.260s	5.747ms	1	1	100.00
V2S	sec_cm_key_sideload	kmac_sideload	3.690m	58.295ms	1	1	100.00
V2S	sec_cm_cfg_shadowed_config_shadow	kmac_shadow_reg_errors	1.420s	35.084us	1	1	100.00
V2S	sec_cm_fsm_sparse	kmac_sec_cm	31.980s	5.703ms	1	1	100.00
V2S	sec_cm_ctr_redun	kmac_sec_cm	31.980s	5.703ms	1	1	100.00
V2S	sec_cm_packer_ctr_redun	kmac_sec_cm	31.980s	5.703ms	1	1	100.00
V2S	sec_cm_cfg_shadowed_config_regwen	kmac_smoke	17.260s	5.747ms	1	1	100.00
V2S	sec_cm_fsm_global_esc	kmac_lc_escalation	22.260s	1.230ms	1	1	100.00
V2S	sec_cm_fsm_local_esc	kmac_sec_cm	31.980s	5.703ms	1	1	100.00
V2S	sec_cm_absorbed_ctrl_mubi	kmac_mubi	2.091m	10.098ms	1	1	100.00
V2S	sec_cm_sw_cmd_ctrl_sparse	kmac_smoke	17.260s	5.747ms	1	1	100.00
V2S		TOTAL			5	5	100.00
V3	stress_all_with_rand_reset	kmac_stress_all_with_rand_reset	53.970s	18.846ms	0	1	0.00
V3		TOTAL			0	1	0.00
		TOTAL			38	40	95.00

Failure Buckets

• UVM_FATAL (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=*, Comparison=CompareOpEq, exp_data=*, call_count=24) has 1 failures:

  • Test kmac_sideload_invalid has 1 failures.

    • 0.kmac_sideload_invalid.33014174319471659672004721324959613417337337451282974957218232792167006037456
      Line 97, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_sideload_invalid/latest/run.log

        UVM_FATAL @ 10826303618 ps: (csr_utils_pkg.sv:614) [csr_utils_pkg::csr_spinwait.isolation_fork] timeout kmac_reg_block.intr_state.kmac_done (addr=0x29f1f000, Comparison=CompareOpEq, exp_data=0x1, call_count=24)
        UVM_INFO @ 10826303618 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---
      

• UVM_ERROR (cip_base_vseq.sv:1229) [kmac_common_vseq] Check failed (!has_outstanding_access()) Waited * cycles to issue a reset with no outstanding accesses. has 1 failures:

  • Test kmac_stress_all_with_rand_reset has 1 failures.

    • 0.kmac_stress_all_with_rand_reset.11847790451449528339166086879986327322346916469324650835095217973193883329109
      Line 168, in log /nightly/current_run/scratch/master/kmac_unmasked-sim-vcs/0.kmac_stress_all_with_rand_reset/latest/run.log

        UVM_ERROR @ 18845998657 ps: (cip_base_vseq.sv:1229) [uvm_test_top.env.virtual_sequencer.kmac_common_vseq] Check failed (!has_outstanding_access()) Waited 100000 cycles to issue a reset with no outstanding accesses.
        UVM_INFO @ 18845998657 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
        --- UVM Report catcher Summary ---