MBX Simulation Results

Wednesday November 05 2025 16:07:17 UTC

GitHub Revision: 9baed2b

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	mbx_smoke	mbx_smoke	35.000s	8.946ms	1	1	100.00
V1	csr_hw_reset	mbx_csr_hw_reset	5.000s	25.196us	1	1	100.00
V1	csr_rw	mbx_csr_rw	3.000s	13.171us	1	1	100.00
V1	csr_bit_bash	mbx_csr_bit_bash	2.000s	115.529us	1	1	100.00
V1	csr_aliasing	mbx_csr_aliasing	1.000s	23.909us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	mbx_csr_mem_rw_with_rand_reset	2.000s	205.922us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	mbx_csr_rw	3.000s	13.171us	1	1	100.00
		mbx_csr_aliasing	1.000s	23.909us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	mbx_stress	mbx_stress	1.100m	4.364ms	1	1	100.00
V2	mbx_max_activity	mbx_stress_zero_delays	1.067m	3.694ms	1	1	100.00
V2	mbx_imbx_oob	mbx_imbx_oob	1.150m	130.128ms	1	1	100.00
V2	mbx_doe_intr_msg	mbx_doe_intr_msg	18.000s	2.236ms	1	1	100.00
V2	alert_test	mbx_alert_test	1.000s	49.495us	1	1	100.00
V2	intr_test	mbx_intr_test	5.000s	27.911us	1	1	100.00
V2	tl_d_oob_addr_access	mbx_tl_errors	7.000s	49.776us	1	1	100.00
V2	tl_d_illegal_access	mbx_tl_errors	7.000s	49.776us	1	1	100.00
V2	tl_d_outstanding_access	mbx_csr_hw_reset	5.000s	25.196us	1	1	100.00
		mbx_csr_rw	3.000s	13.171us	1	1	100.00
		mbx_csr_aliasing	1.000s	23.909us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	369.766us	1	1	100.00
V2	tl_d_partial_access	mbx_csr_hw_reset	5.000s	25.196us	1	1	100.00
		mbx_csr_rw	3.000s	13.171us	1	1	100.00
		mbx_csr_aliasing	1.000s	23.909us	1	1	100.00
		mbx_same_csr_outstanding	2.000s	369.766us	1	1	100.00
V2		TOTAL			8	8	100.00
V2S	tl_intg_err	mbx_tl_intg_err	6.000s	1.725ms	1	1	100.00
		mbx_sec_cm	2.000s	41.786us	1	1	100.00
V2S		TOTAL			2	2	100.00
		TOTAL			16	16	100.00