| V1 |
smoke |
aon_timer_smoke |
1.170s |
|
1 |
1 |
100.00 |
| V1 |
csr_hw_reset |
aon_timer_csr_hw_reset |
1.070s |
|
1 |
1 |
100.00 |
| V1 |
csr_rw |
aon_timer_csr_rw |
0.970s |
|
1 |
1 |
100.00 |
| V1 |
csr_bit_bash |
aon_timer_csr_bit_bash |
9.000s |
|
1 |
1 |
100.00 |
| V1 |
csr_aliasing |
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
| V1 |
csr_mem_rw_with_rand_reset |
aon_timer_csr_mem_rw_with_rand_reset |
1.230s |
|
1 |
1 |
100.00 |
| V1 |
regwen_csr_and_corresponding_lockable_csr |
aon_timer_csr_rw |
0.970s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
| V1 |
mem_walk |
aon_timer_mem_walk |
0.820s |
|
1 |
1 |
100.00 |
| V1 |
mem_partial_access |
aon_timer_mem_partial_access |
0.670s |
|
1 |
1 |
100.00 |
| V1 |
|
TOTAL |
|
|
8 |
8 |
100.00 |
| V2 |
prescaler |
aon_timer_prescaler |
5.260s |
|
1 |
1 |
100.00 |
| V2 |
jump |
aon_timer_jump |
0.850s |
|
1 |
1 |
100.00 |
| V2 |
stress_all |
aon_timer_stress_all |
51.880s |
|
1 |
1 |
100.00 |
| V2 |
alert_test |
aon_timer_alert_test |
1.210s |
|
1 |
1 |
100.00 |
| V2 |
intr_test |
aon_timer_intr_test |
0.710s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_oob_addr_access |
aon_timer_tl_errors |
1.790s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_illegal_access |
aon_timer_tl_errors |
1.790s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_outstanding_access |
aon_timer_csr_hw_reset |
1.070s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.970s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.190s |
|
1 |
1 |
100.00 |
| V2 |
tl_d_partial_access |
aon_timer_csr_hw_reset |
1.070s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_rw |
0.970s |
|
1 |
1 |
100.00 |
|
|
aon_timer_csr_aliasing |
0.800s |
|
1 |
1 |
100.00 |
|
|
aon_timer_same_csr_outstanding |
4.190s |
|
1 |
1 |
100.00 |
| V2 |
|
TOTAL |
|
|
7 |
7 |
100.00 |
| V2S |
tl_intg_err |
aon_timer_sec_cm |
5.810s |
|
1 |
1 |
100.00 |
|
|
aon_timer_tl_intg_err |
5.650s |
|
1 |
1 |
100.00 |
| V2S |
sec_cm_bus_integrity |
aon_timer_tl_intg_err |
5.650s |
|
1 |
1 |
100.00 |
| V2S |
|
TOTAL |
|
|
2 |
2 |
100.00 |
| V3 |
max_threshold |
aon_timer_smoke_max_thold |
1.290s |
|
1 |
1 |
100.00 |
| V3 |
min_threshold |
aon_timer_smoke_min_thold |
0.860s |
|
1 |
1 |
100.00 |
| V3 |
wkup_count_hi_cdc |
aon_timer_wkup_count_cdc_hi |
6.840s |
|
1 |
1 |
100.00 |
| V3 |
custom_intr |
aon_timer_custom_intr |
1.300s |
|
1 |
1 |
100.00 |
| V3 |
alternating_on_off |
aon_timer_alternating_enable_on_off |
4.890s |
|
1 |
1 |
100.00 |
| V3 |
stress_all_with_rand_reset |
aon_timer_stress_all_with_rand_reset |
7.200s |
|
1 |
1 |
100.00 |
| V3 |
|
TOTAL |
|
|
6 |
6 |
100.00 |
|
|
TOTAL |
|
|
23 |
23 |
100.00 |