ENTROPY_SRC/RNG_16BITS Simulation Results

Thursday November 13 2025 16:09:11 UTC

GitHub Revision: 33c2274

Branch: master

Testplan

Simulator: XCELIUM

Test Results

Stage	Name	Tests	Max Job Runtime	Simulated Time	Passing	Total	Pass Rate
V1	smoke	entropy_src_smoke	2.000s	19.710us	1	1	100.00
V1	csr_hw_reset	entropy_src_csr_hw_reset	2.000s	27.202us	1	1	100.00
V1	csr_rw	entropy_src_csr_rw	2.000s	69.049us	1	1	100.00
V1	csr_bit_bash	entropy_src_csr_bit_bash	4.000s	88.674us	1	1	100.00
V1	csr_aliasing	entropy_src_csr_aliasing	4.000s	158.572us	1	1	100.00
V1	csr_mem_rw_with_rand_reset	entropy_src_csr_mem_rw_with_rand_reset	2.000s	96.356us	1	1	100.00
V1	regwen_csr_and_corresponding_lockable_csr	entropy_src_csr_rw	2.000s	69.049us	1	1	100.00
		entropy_src_csr_aliasing	4.000s	158.572us	1	1	100.00
V1		TOTAL			6	6	100.00
V2	firmware	entropy_src_smoke	2.000s	19.710us	1	1	100.00
		entropy_src_rng	390.000s	14105.608us	1	1	100.00
		entropy_src_fw_ov	416.000s	17015.706us	1	1	100.00
V2	firmware_mode	entropy_src_fw_ov	416.000s	17015.706us	1	1	100.00
V2	rng_mode	entropy_src_rng	390.000s	14105.608us	1	1	100.00
V2	rng_max_rate	entropy_src_rng_max_rate	226.000s	20065.149us	1	1	100.00
V2	health_checks	entropy_src_rng	390.000s	14105.608us	1	1	100.00
V2	conditioning	entropy_src_rng	390.000s	14105.608us	1	1	100.00
V2	interrupts	entropy_src_rng	390.000s	14105.608us	1	1	100.00
		entropy_src_intr	13.000s	489.673us	1	1	100.00
V2	alerts	entropy_src_rng	390.000s	14105.608us	1	1	100.00
		entropy_src_functional_alerts	6.000s	171.102us	1	1	100.00
V2	stress_all	entropy_src_stress_all	3.000s	35.072us	1	1	100.00
V2	functional_errors	entropy_src_functional_errors	3.000s	102.317us	1	1	100.00
V2	firmware_ov_read_contiguous_data	entropy_src_fw_ov_contiguous	3.000s	55.833us	1	1	100.00
V2	intr_test	entropy_src_intr_test	2.000s	21.684us	1	1	100.00
V2	alert_test	entropy_src_alert_test	3.000s	25.812us	1	1	100.00
V2	tl_d_oob_addr_access	entropy_src_tl_errors	5.000s	1938.202us	1	1	100.00
V2	tl_d_illegal_access	entropy_src_tl_errors	5.000s	1938.202us	1	1	100.00
V2	tl_d_outstanding_access	entropy_src_csr_hw_reset	2.000s	27.202us	1	1	100.00
		entropy_src_csr_rw	2.000s	69.049us	1	1	100.00
		entropy_src_csr_aliasing	4.000s	158.572us	1	1	100.00
		entropy_src_same_csr_outstanding	3.000s	24.413us	1	1	100.00
V2	tl_d_partial_access	entropy_src_csr_hw_reset	2.000s	27.202us	1	1	100.00
		entropy_src_csr_rw	2.000s	69.049us	1	1	100.00
		entropy_src_csr_aliasing	4.000s	158.572us	1	1	100.00
		entropy_src_same_csr_outstanding	3.000s	24.413us	1	1	100.00
V2		TOTAL			12	12	100.00
V2S	tl_intg_err	entropy_src_tl_intg_err	5.000s	175.819us	1	1	100.00
		entropy_src_sec_cm	3.000s	96.761us	1	1	100.00
V2S	sec_cm_config_regwen	entropy_src_rng	390.000s	14105.608us	1	1	100.00
		entropy_src_cfg_regwen	2.000s	59.990us	1	1	100.00
V2S	sec_cm_config_mubi	entropy_src_rng	390.000s	14105.608us	1	1	100.00
V2S	sec_cm_config_redun	entropy_src_rng	390.000s	14105.608us	1	1	100.00
V2S	sec_cm_intersig_mubi	entropy_src_rng	390.000s	14105.608us	1	1	100.00
		entropy_src_fw_ov	416.000s	17015.706us	1	1	100.00
V2S	sec_cm_main_sm_fsm_sparse	entropy_src_functional_errors	3.000s	102.317us	1	1	100.00
		entropy_src_sec_cm	3.000s	96.761us	1	1	100.00
V2S	sec_cm_ack_sm_fsm_sparse	entropy_src_functional_errors	3.000s	102.317us	1	1	100.00
		entropy_src_sec_cm	3.000s	96.761us	1	1	100.00
V2S	sec_cm_rng_bkgn_chk	entropy_src_rng	390.000s	14105.608us	1	1	100.00
V2S	sec_cm_fifo_ctr_redun	entropy_src_functional_errors	3.000s	102.317us	1	1	100.00
		entropy_src_sec_cm	3.000s	96.761us	1	1	100.00
V2S	sec_cm_ctr_redun	entropy_src_functional_errors	3.000s	102.317us	1	1	100.00
		entropy_src_sec_cm	3.000s	96.761us	1	1	100.00
V2S	sec_cm_ctr_local_esc	entropy_src_functional_errors	3.000s	102.317us	1	1	100.00
V2S	sec_cm_esfinal_rdata_bus_consistency	entropy_src_functional_alerts	6.000s	171.102us	1	1	100.00
V2S	sec_cm_tile_link_bus_integrity	entropy_src_tl_intg_err	5.000s	175.819us	1	1	100.00
V2S		TOTAL			3	3	100.00
V3	external_health_tests	entropy_src_rng_with_xht_rsps	282.000s	12017.274us	1	1	100.00
V3		TOTAL			1	1	100.00
		TOTAL			22	22	100.00

Coverage Results

Coverage Dashboard

Score	Block	Branch	Statement	Expression	Toggle	Fsm	Assertion	CoverGroup
80.84	95.88	89.93	98.43	91.37	53.01	94.79	73.25	54.67