Simulation Results: ac_range_check

 
18/11/2025 16:10:04 sha: 7662858 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 96.62
  • block
  • 99.21
  • branch
  • 98.35
  • statement
  • 99.94
  • expression
  • 99.07
  • toggle
  • 81.0
  • fsm
  • None
  • assertion
  • 97.63
  • covergroup
  • 57.93
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 28.000s 1186.776us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 35.000s 1630.185us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 2.000s 49.432us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 2.000s 137.081us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 34.000s 4328.582us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 21.000s 4337.658us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 1.000s 27.459us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 2.000s 137.081us 1 1 100.00
ac_range_check_csr_aliasing 21.000s 4337.658us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 2.000s 24.409us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 29.000s 1684.226us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 150.000s 13199.507us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 2.000s 34.583us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 6.000s 22.814us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 3.000s 659.841us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 3.000s 659.841us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 49.432us 1 1 100.00
ac_range_check_csr_rw 2.000s 137.081us 1 1 100.00
ac_range_check_csr_aliasing 21.000s 4337.658us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 55.249us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 49.432us 1 1 100.00
ac_range_check_csr_rw 2.000s 137.081us 1 1 100.00
ac_range_check_csr_aliasing 21.000s 4337.658us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 55.249us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 3673.971us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 3673.971us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 3673.971us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 3673.971us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 93.000s 10746.983us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 1.000s 20.963us 1 1 100.00
ac_range_check_tl_intg_err 7.000s 117.030us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 222.000s 14076.323us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 35.000s 1404.812us 1 1 100.00