| V1 |
|
100.00% |
| V2 |
|
100.00% |
| V2S |
|
100.00% |
| V3 |
|
100.00% |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| smoke | 1 | 1 | 100.00 | |||
| entropy_src_smoke | 2.000s | 29.503us | 1 | 1 | 100.00 | |
| csr_hw_reset | 1 | 1 | 100.00 | |||
| entropy_src_csr_hw_reset | 2.000s | 30.899us | 1 | 1 | 100.00 | |
| csr_rw | 1 | 1 | 100.00 | |||
| entropy_src_csr_rw | 2.000s | 27.041us | 1 | 1 | 100.00 | |
| csr_bit_bash | 1 | 1 | 100.00 | |||
| entropy_src_csr_bit_bash | 6.000s | 501.511us | 1 | 1 | 100.00 | |
| csr_aliasing | 1 | 1 | 100.00 | |||
| entropy_src_csr_aliasing | 4.000s | 402.536us | 1 | 1 | 100.00 | |
| csr_mem_rw_with_rand_reset | 1 | 1 | 100.00 | |||
| entropy_src_csr_mem_rw_with_rand_reset | 2.000s | 30.830us | 1 | 1 | 100.00 | |
| regwen_csr_and_corresponding_lockable_csr | 2 | 2 | 100.00 | |||
| entropy_src_csr_rw | 2.000s | 27.041us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 4.000s | 402.536us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| firmware | 3 | 3 | 100.00 | |||
| entropy_src_smoke | 2.000s | 29.503us | 1 | 1 | 100.00 | |
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| entropy_src_fw_ov | 64.000s | 9278.976us | 1 | 1 | 100.00 | |
| firmware_mode | 1 | 1 | 100.00 | |||
| entropy_src_fw_ov | 64.000s | 9278.976us | 1 | 1 | 100.00 | |
| rng_mode | 1 | 1 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| rng_max_rate | 1 | 1 | 100.00 | |||
| entropy_src_rng_max_rate | 52.000s | 14141.395us | 1 | 1 | 100.00 | |
| health_checks | 1 | 1 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| conditioning | 1 | 1 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| interrupts | 2 | 2 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| entropy_src_intr | 17.000s | 507.211us | 1 | 1 | 100.00 | |
| alerts | 2 | 2 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| entropy_src_functional_alerts | 5.000s | 170.931us | 1 | 1 | 100.00 | |
| stress_all | 1 | 1 | 100.00 | |||
| entropy_src_stress_all | 218.000s | 14152.924us | 1 | 1 | 100.00 | |
| functional_errors | 1 | 1 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 76.217us | 1 | 1 | 100.00 | |
| firmware_ov_read_contiguous_data | 1 | 1 | 100.00 | |||
| entropy_src_fw_ov_contiguous | 3.000s | 129.358us | 1 | 1 | 100.00 | |
| intr_test | 1 | 1 | 100.00 | |||
| entropy_src_intr_test | 2.000s | 23.471us | 1 | 1 | 100.00 | |
| alert_test | 1 | 1 | 100.00 | |||
| entropy_src_alert_test | 2.000s | 76.007us | 1 | 1 | 100.00 | |
| tl_d_oob_addr_access | 1 | 1 | 100.00 | |||
| entropy_src_tl_errors | 4.000s | 181.122us | 1 | 1 | 100.00 | |
| tl_d_illegal_access | 1 | 1 | 100.00 | |||
| entropy_src_tl_errors | 4.000s | 181.122us | 1 | 1 | 100.00 | |
| tl_d_outstanding_access | 4 | 4 | 100.00 | |||
| entropy_src_csr_hw_reset | 2.000s | 30.899us | 1 | 1 | 100.00 | |
| entropy_src_csr_rw | 2.000s | 27.041us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 4.000s | 402.536us | 1 | 1 | 100.00 | |
| entropy_src_same_csr_outstanding | 3.000s | 44.024us | 1 | 1 | 100.00 | |
| tl_d_partial_access | 4 | 4 | 100.00 | |||
| entropy_src_csr_hw_reset | 2.000s | 30.899us | 1 | 1 | 100.00 | |
| entropy_src_csr_rw | 2.000s | 27.041us | 1 | 1 | 100.00 | |
| entropy_src_csr_aliasing | 4.000s | 402.536us | 1 | 1 | 100.00 | |
| entropy_src_same_csr_outstanding | 3.000s | 44.024us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| tl_intg_err | 2 | 2 | 100.00 | |||
| entropy_src_tl_intg_err | 4.000s | 237.793us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 140.941us | 1 | 1 | 100.00 | |
| sec_cm_config_regwen | 2 | 2 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| entropy_src_cfg_regwen | 3.000s | 30.491us | 1 | 1 | 100.00 | |
| sec_cm_config_mubi | 1 | 1 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| sec_cm_config_redun | 1 | 1 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| sec_cm_intersig_mubi | 2 | 2 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| entropy_src_fw_ov | 64.000s | 9278.976us | 1 | 1 | 100.00 | |
| sec_cm_main_sm_fsm_sparse | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 76.217us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 140.941us | 1 | 1 | 100.00 | |
| sec_cm_ack_sm_fsm_sparse | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 76.217us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 140.941us | 1 | 1 | 100.00 | |
| sec_cm_rng_bkgn_chk | 1 | 1 | 100.00 | |||
| entropy_src_rng | 175.000s | 8034.024us | 1 | 1 | 100.00 | |
| sec_cm_fifo_ctr_redun | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 76.217us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 140.941us | 1 | 1 | 100.00 | |
| sec_cm_ctr_redun | 2 | 2 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 76.217us | 1 | 1 | 100.00 | |
| entropy_src_sec_cm | 2.000s | 140.941us | 1 | 1 | 100.00 | |
| sec_cm_ctr_local_esc | 1 | 1 | 100.00 | |||
| entropy_src_functional_errors | 3.000s | 76.217us | 1 | 1 | 100.00 | |
| sec_cm_esfinal_rdata_bus_consistency | 1 | 1 | 100.00 | |||
| entropy_src_functional_alerts | 5.000s | 170.931us | 1 | 1 | 100.00 | |
| sec_cm_tile_link_bus_integrity | 1 | 1 | 100.00 | |||
| entropy_src_tl_intg_err | 4.000s | 237.793us | 1 | 1 | 100.00 | |
| Testpoint | Test | Max Runtime | Sim Time | Pass | Total | % |
|---|---|---|---|---|---|---|
| external_health_tests | 1 | 1 | 100.00 | |||
| entropy_src_rng_with_xht_rsps | 405.000s | 18078.923us | 1 | 1 | 100.00 | |