Simulation Results: keymgr

 
18/11/2025 16:10:04 sha: 7662858 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 90.48
  • line
  • 98.7
  • cond
  • 94.83
  • toggle
  • 96.71
  • fsm
  • 86.05
  • branch
  • 97.76
  • assert
  • 97.49
  • group
  • 61.84
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 3.460s 772.934us 1 1 100.00
random 1 1 100.00
keymgr_random 2.660s 628.634us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.840s 81.626us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.990s 19.223us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 21.910s 4577.006us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 5.490s 495.563us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.240s 104.075us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.990s 19.223us 1 1 100.00
keymgr_csr_aliasing 5.490s 495.563us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 30.690s 1863.743us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 26.830s 18140.886us 1 1 100.00
keymgr_sideload_kmac 4.930s 216.949us 1 1 100.00
keymgr_sideload_aes 2.600s 154.780us 1 1 100.00
keymgr_sideload_otbn 1.970s 50.486us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.460s 269.455us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.480s 861.159us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.800s 68.614us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 3.550s 100.781us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 4.350s 240.412us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.070s 78.571us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 21.720s 1342.763us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.780s 16.891us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.780s 42.110us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.150s 74.706us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.150s 74.706us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.840s 81.626us 1 1 100.00
keymgr_csr_rw 0.990s 19.223us 1 1 100.00
keymgr_csr_aliasing 5.490s 495.563us 1 1 100.00
keymgr_same_csr_outstanding 1.210s 133.407us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.840s 81.626us 1 1 100.00
keymgr_csr_rw 0.990s 19.223us 1 1 100.00
keymgr_csr_aliasing 5.490s 495.563us 1 1 100.00
keymgr_same_csr_outstanding 1.210s 133.407us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
keymgr_tl_intg_err 3.520s 238.081us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 3.920s 2318.637us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 3.920s 2318.637us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 3.920s 2318.637us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 3.920s 2318.637us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 3.750s 217.346us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.520s 238.081us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 3.920s 2318.637us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 30.690s 1863.743us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 2.660s 628.634us 1 1 100.00
keymgr_csr_rw 0.990s 19.223us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 2.660s 628.634us 1 1 100.00
keymgr_csr_rw 0.990s 19.223us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 2.660s 628.634us 1 1 100.00
keymgr_csr_rw 0.990s 19.223us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.480s 861.159us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 4.350s 240.412us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 4.350s 240.412us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 2.660s 628.634us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 1.950s 145.925us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 1.240s 275.777us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.480s 861.159us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.240s 275.777us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.240s 275.777us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 1.240s 275.777us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 8.260s 1154.637us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 1.240s 275.777us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 5.490s 134.935us 1 1 100.00