Simulation Results: rstmgr

 
18/11/2025 16:10:04 sha: 7662858 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 98.27
  • line
  • 99.19
  • cond
  • 98.75
  • toggle
  • 99.52
  • fsm
  • None
  • branch
  • 99.72
  • assert
  • 97.25
  • group
  • 95.18
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
rstmgr_smoke 1.280s 62.427us 1 1 100.00
csr_hw_reset 1 1 100.00
rstmgr_csr_hw_reset 0.940s 64.794us 1 1 100.00
csr_rw 1 1 100.00
rstmgr_csr_rw 1.040s 37.081us 1 1 100.00
csr_bit_bash 1 1 100.00
rstmgr_csr_bit_bash 1.940s 51.528us 1 1 100.00
csr_aliasing 1 1 100.00
rstmgr_csr_aliasing 1.240s 40.989us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
rstmgr_csr_mem_rw_with_rand_reset 1.530s 95.997us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
rstmgr_csr_rw 1.040s 37.081us 1 1 100.00
rstmgr_csr_aliasing 1.240s 40.989us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_stretcher 1 1 100.00
rstmgr_por_stretcher 0.910s 57.546us 1 1 100.00
sw_rst 1 1 100.00
rstmgr_sw_rst 1.100s 42.907us 1 1 100.00
sw_rst_reset_race 1 1 100.00
rstmgr_sw_rst_reset_race 0.820s 38.767us 1 1 100.00
reset_info 1 1 100.00
rstmgr_reset 3.940s 441.916us 1 1 100.00
cpu_info 1 1 100.00
rstmgr_reset 3.940s 441.916us 1 1 100.00
alert_info 1 1 100.00
rstmgr_reset 3.940s 441.916us 1 1 100.00
reset_info_capture 1 1 100.00
rstmgr_reset 3.940s 441.916us 1 1 100.00
stress_all 1 1 100.00
rstmgr_stress_all 20.850s 3000.825us 1 1 100.00
alert_test 1 1 100.00
rstmgr_alert_test 1.010s 36.562us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
rstmgr_tl_errors 1.280s 48.878us 1 1 100.00
tl_d_illegal_access 1 1 100.00
rstmgr_tl_errors 1.280s 48.878us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
rstmgr_csr_hw_reset 0.940s 64.794us 1 1 100.00
rstmgr_csr_rw 1.040s 37.081us 1 1 100.00
rstmgr_csr_aliasing 1.240s 40.989us 1 1 100.00
rstmgr_same_csr_outstanding 1.550s 46.767us 1 1 100.00
tl_d_partial_access 4 4 100.00
rstmgr_csr_hw_reset 0.940s 64.794us 1 1 100.00
rstmgr_csr_rw 1.040s 37.081us 1 1 100.00
rstmgr_csr_aliasing 1.240s 40.989us 1 1 100.00
rstmgr_same_csr_outstanding 1.550s 46.767us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
rstmgr_tl_intg_err 2.500s 331.811us 1 1 100.00
rstmgr_sec_cm 32.510s 7076.104us 1 1 100.00
prim_count_check 1 1 100.00
rstmgr_sec_cm 32.510s 7076.104us 1 1 100.00
prim_fsm_check 1 1 100.00
rstmgr_sec_cm 32.510s 7076.104us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
rstmgr_tl_intg_err 2.500s 331.811us 1 1 100.00
sec_cm_scan_intersig_mubi 1 1 100.00
rstmgr_sec_cm_scan_intersig_mubi 1.250s 60.831us 1 1 100.00
sec_cm_leaf_rst_bkgn_chk 1 1 100.00
rstmgr_leaf_rst_cnsty 3.370s 424.153us 1 1 100.00
sec_cm_leaf_rst_shadow 1 1 100.00
rstmgr_leaf_rst_shadow_attack 2.150s 292.059us 1 1 100.00
sec_cm_leaf_fsm_sparse 1 1 100.00
rstmgr_sec_cm 32.510s 7076.104us 1 1 100.00
sec_cm_sw_rst_config_regwen 1 1 100.00
rstmgr_csr_rw 1.040s 37.081us 1 1 100.00
sec_cm_dump_ctrl_config_regwen 1 1 100.00
rstmgr_csr_rw 1.040s 37.081us 1 1 100.00