Simulation Results: ac_range_check

 
19/11/2025 16:06:30 sha: 241b623 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 96.61
  • block
  • 99.21
  • branch
  • 98.35
  • statement
  • 99.94
  • expression
  • 99.07
  • toggle
  • 81.0
  • fsm
  • None
  • assertion
  • 97.63
  • covergroup
  • 57.84
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 33.000s 5496.126us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 34.000s 1275.985us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 2.000s 153.137us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 3.000s 84.261us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 23.000s 1899.890us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1044.187us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 2.000s 56.066us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 3.000s 84.261us 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1044.187us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 4.000s 82.860us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 30.000s 6380.837us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 140.000s 7025.060us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 2.000s 40.353us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 2.000s 153.690us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 5.000s 105.740us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 5.000s 105.740us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 153.137us 1 1 100.00
ac_range_check_csr_rw 3.000s 84.261us 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1044.187us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 50.344us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 153.137us 1 1 100.00
ac_range_check_csr_rw 3.000s 84.261us 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1044.187us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 50.344us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 13.000s 837.121us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 13.000s 837.121us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 13.000s 837.121us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 13.000s 837.121us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 72.000s 1490.183us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 2.000s 42.004us 1 1 100.00
ac_range_check_tl_intg_err 11.000s 607.855us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 248.000s 5637.523us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 25.000s 4533.389us 1 1 100.00