| host_error_intr |
0 |
1 |
0.00 |
|
i2c_host_error_intr |
0.890s |
65.694us |
0 |
1 |
0.00
|
| host_stress_all |
1 |
1 |
100.00 |
|
i2c_host_stress_all |
579.350s |
84923.734us |
1 |
1 |
100.00
|
| host_maxperf |
1 |
1 |
100.00 |
|
i2c_host_perf |
1560.750s |
71654.561us |
1 |
1 |
100.00
|
| host_override |
1 |
1 |
100.00 |
|
i2c_host_override |
0.840s |
45.954us |
1 |
1 |
100.00
|
| host_fifo_watermark |
1 |
1 |
100.00 |
|
i2c_host_fifo_watermark |
202.000s |
17350.386us |
1 |
1 |
100.00
|
| host_fifo_overflow |
1 |
1 |
100.00 |
|
i2c_host_fifo_overflow |
50.810s |
2394.402us |
1 |
1 |
100.00
|
| host_fifo_reset |
3 |
3 |
100.00 |
|
i2c_host_fifo_reset_fmt |
1.300s |
84.389us |
1 |
1 |
100.00
|
|
i2c_host_fifo_fmt_empty |
4.810s |
312.955us |
1 |
1 |
100.00
|
|
i2c_host_fifo_reset_rx |
7.740s |
179.348us |
1 |
1 |
100.00
|
| host_fifo_full |
1 |
1 |
100.00 |
|
i2c_host_fifo_full |
48.290s |
9966.533us |
1 |
1 |
100.00
|
| host_timeout |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
29.250s |
3317.794us |
1 |
1 |
100.00
|
| i2c_host_mode_toggle |
0 |
1 |
0.00 |
|
i2c_host_mode_toggle |
1.590s |
350.385us |
0 |
1 |
0.00
|
| target_glitch |
0 |
1 |
0.00 |
|
i2c_target_glitch |
3.880s |
2034.979us |
0 |
1 |
0.00
|
| target_stress_all |
1 |
1 |
100.00 |
|
i2c_target_stress_all |
78.450s |
82210.205us |
1 |
1 |
100.00
|
| target_maxperf |
1 |
1 |
100.00 |
|
i2c_target_perf |
4.980s |
3309.494us |
1 |
1 |
100.00
|
| target_fifo_empty |
2 |
2 |
100.00 |
|
i2c_target_stress_rd |
10.050s |
802.782us |
1 |
1 |
100.00
|
|
i2c_target_intr_smoke |
4.320s |
1220.130us |
1 |
1 |
100.00
|
| target_fifo_reset |
2 |
2 |
100.00 |
|
i2c_target_fifo_reset_acq |
1.250s |
210.099us |
1 |
1 |
100.00
|
|
i2c_target_fifo_reset_tx |
1.150s |
197.284us |
1 |
1 |
100.00
|
| target_fifo_full |
3 |
3 |
100.00 |
|
i2c_target_stress_wr |
30.700s |
35428.369us |
1 |
1 |
100.00
|
|
i2c_target_stress_rd |
10.050s |
802.782us |
1 |
1 |
100.00
|
|
i2c_target_intr_stress_wr |
23.760s |
16270.409us |
1 |
1 |
100.00
|
| target_timeout |
1 |
1 |
100.00 |
|
i2c_target_timeout |
4.850s |
1535.381us |
1 |
1 |
100.00
|
| target_clock_stretch |
1 |
1 |
100.00 |
|
i2c_target_stretch |
14.300s |
2576.151us |
1 |
1 |
100.00
|
| bad_address |
1 |
1 |
100.00 |
|
i2c_target_bad_addr |
3.320s |
840.856us |
1 |
1 |
100.00
|
| target_mode_glitch |
1 |
1 |
100.00 |
|
i2c_target_hrst |
2.780s |
5119.376us |
1 |
1 |
100.00
|
| target_fifo_watermark |
2 |
2 |
100.00 |
|
i2c_target_fifo_watermarks_acq |
1.850s |
341.672us |
1 |
1 |
100.00
|
|
i2c_target_fifo_watermarks_tx |
1.230s |
181.730us |
1 |
1 |
100.00
|
| host_mode_config_perf |
2 |
2 |
100.00 |
|
i2c_host_perf |
1560.750s |
71654.561us |
1 |
1 |
100.00
|
|
i2c_host_perf_precise |
15.520s |
1369.892us |
1 |
1 |
100.00
|
| host_mode_clock_stretching |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
29.250s |
3317.794us |
1 |
1 |
100.00
|
| target_mode_tx_stretch_ctrl |
1 |
1 |
100.00 |
|
i2c_target_tx_stretch_ctrl |
1.660s |
105.634us |
1 |
1 |
100.00
|
| target_mode_nack_generation |
3 |
3 |
100.00 |
|
i2c_target_nack_acqfull |
1.980s |
3119.343us |
1 |
1 |
100.00
|
|
i2c_target_nack_acqfull_addr |
2.230s |
543.125us |
1 |
1 |
100.00
|
|
i2c_target_nack_txstretch |
1.140s |
589.805us |
1 |
1 |
100.00
|
| host_mode_halt_on_nak |
1 |
1 |
100.00 |
|
i2c_host_may_nack |
7.010s |
1071.472us |
1 |
1 |
100.00
|
| target_mode_smbus_maxlen |
1 |
1 |
100.00 |
|
i2c_target_smbus_maxlen |
1.630s |
873.339us |
1 |
1 |
100.00
|
| alert_test |
1 |
1 |
100.00 |
|
i2c_alert_test |
0.650s |
31.033us |
1 |
1 |
100.00
|
| intr_test |
1 |
1 |
100.00 |
|
i2c_intr_test |
0.840s |
16.372us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.940s |
273.784us |
1 |
1 |
100.00
|
| tl_d_illegal_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.940s |
273.784us |
1 |
1 |
100.00
|
| tl_d_outstanding_access |
3 |
4 |
75.00 |
|
i2c_csr_hw_reset |
0.720s |
60.089us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.640s |
243.955us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.060s |
102.729us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
1.170s |
184.386us |
0 |
1 |
0.00
|
| tl_d_partial_access |
3 |
4 |
75.00 |
|
i2c_csr_hw_reset |
0.720s |
60.089us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.640s |
243.955us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.060s |
102.729us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
1.170s |
184.386us |
0 |
1 |
0.00
|