Simulation Results: keymgr

 
19/11/2025 16:06:30 sha: 241b623 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 92.09
  • line
  • 98.74
  • cond
  • 94.48
  • toggle
  • 97.65
  • fsm
  • 90.7
  • branch
  • 98.03
  • assert
  • 97.72
  • group
  • 67.34
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 1.570s 25.649us 1 1 100.00
random 1 1 100.00
keymgr_random 2.760s 120.910us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.090s 25.788us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.850s 48.266us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 9.760s 253.633us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.300s 134.180us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.010s 29.499us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.850s 48.266us 1 1 100.00
keymgr_csr_aliasing 3.300s 134.180us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 10.630s 1344.006us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 1.900s 46.927us 1 1 100.00
keymgr_sideload_kmac 1.920s 141.136us 1 1 100.00
keymgr_sideload_aes 2.770s 452.592us 1 1 100.00
keymgr_sideload_otbn 2.500s 336.925us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 7.690s 1340.522us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 2.910s 353.821us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 3.940s 216.977us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 7.710s 522.518us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 4.350s 572.842us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 2.140s 67.882us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 336.170s 51110.879us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.800s 10.943us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.730s 13.958us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.840s 410.095us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.840s 410.095us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.090s 25.788us 1 1 100.00
keymgr_csr_rw 0.850s 48.266us 1 1 100.00
keymgr_csr_aliasing 3.300s 134.180us 1 1 100.00
keymgr_same_csr_outstanding 2.010s 488.303us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.090s 25.788us 1 1 100.00
keymgr_csr_rw 0.850s 48.266us 1 1 100.00
keymgr_csr_aliasing 3.300s 134.180us 1 1 100.00
keymgr_same_csr_outstanding 2.010s 488.303us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
keymgr_tl_intg_err 2.940s 115.950us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.590s 97.499us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.590s 97.499us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.590s 97.499us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.590s 97.499us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 7.640s 869.712us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 2.940s 115.950us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.590s 97.499us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 10.630s 1344.006us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 2.760s 120.910us 1 1 100.00
keymgr_csr_rw 0.850s 48.266us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 2.760s 120.910us 1 1 100.00
keymgr_csr_rw 0.850s 48.266us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 2.760s 120.910us 1 1 100.00
keymgr_csr_rw 0.850s 48.266us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 2.910s 353.821us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 4.350s 572.842us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 4.350s 572.842us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 2.760s 120.910us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.660s 56.512us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 4.920s 199.018us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 2.910s 353.821us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.920s 199.018us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.920s 199.018us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.920s 199.018us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 11.730s 6305.902us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 4.920s 199.018us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
keymgr_stress_all_with_rand_reset 4.410s 669.978us 0 1 0.00