Simulation Results: spi_host

 
19/11/2025 16:06:30 sha: 241b623 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 95.09
  • block
  • 96.36
  • branch
  • 92.35
  • statement
  • 98.01
  • expression
  • 91.38
  • toggle
  • 87.19
  • fsm
  • 100.0
  • assertion
  • 93.54
  • covergroup
  • 86.25
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_host_smoke 86.000s 5704.334us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_host_csr_hw_reset 2.000s 16.945us 1 1 100.00
csr_rw 1 1 100.00
spi_host_csr_rw 1.000s 44.181us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_host_csr_bit_bash 3.000s 55.999us 1 1 100.00
csr_aliasing 1 1 100.00
spi_host_csr_aliasing 2.000s 28.209us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_host_csr_mem_rw_with_rand_reset 2.000s 64.128us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_host_csr_rw 1.000s 44.181us 1 1 100.00
spi_host_csr_aliasing 2.000s 28.209us 1 1 100.00
mem_walk 1 1 100.00
spi_host_mem_walk 1.000s 15.674us 1 1 100.00
mem_partial_access 1 1 100.00
spi_host_mem_partial_access 2.000s 73.510us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
performance 1 1 100.00
spi_host_performance 2.000s 242.166us 1 1 100.00
error_event_intr 3 3 100.00
spi_host_overflow_underflow 4.000s 313.755us 1 1 100.00
spi_host_error_cmd 2.000s 35.426us 1 1 100.00
spi_host_event 7.000s 1703.656us 1 1 100.00
clock_rate 1 1 100.00
spi_host_speed 4.000s 263.684us 1 1 100.00
speed 1 1 100.00
spi_host_speed 4.000s 263.684us 1 1 100.00
chip_select_timing 1 1 100.00
spi_host_speed 4.000s 263.684us 1 1 100.00
sw_reset 1 1 100.00
spi_host_sw_reset 6.000s 556.250us 1 1 100.00
passthrough_mode 1 1 100.00
spi_host_passthrough_mode 1.000s 23.386us 1 1 100.00
cpol_cpha 1 1 100.00
spi_host_speed 4.000s 263.684us 1 1 100.00
full_cycle 1 1 100.00
spi_host_speed 4.000s 263.684us 1 1 100.00
duplex 1 1 100.00
spi_host_smoke 86.000s 5704.334us 1 1 100.00
tx_rx_only 1 1 100.00
spi_host_smoke 86.000s 5704.334us 1 1 100.00
stress_all 1 1 100.00
spi_host_stress_all 51.000s 2577.241us 1 1 100.00
spien 1 1 100.00
spi_host_spien 7.000s 364.496us 1 1 100.00
stall 1 1 100.00
spi_host_status_stall 13.000s 3004.497us 1 1 100.00
Idlecsbactive 1 1 100.00
spi_host_idlecsbactive 2.000s 102.404us 1 1 100.00
data_fifo_status 1 1 100.00
spi_host_overflow_underflow 4.000s 313.755us 1 1 100.00
alert_test 1 1 100.00
spi_host_alert_test 1.000s 38.334us 1 1 100.00
intr_test 1 1 100.00
spi_host_intr_test 1.000s 16.043us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_host_tl_errors 2.000s 1383.688us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_host_tl_errors 2.000s 1383.688us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_host_csr_hw_reset 2.000s 16.945us 1 1 100.00
spi_host_csr_rw 1.000s 44.181us 1 1 100.00
spi_host_csr_aliasing 2.000s 28.209us 1 1 100.00
spi_host_same_csr_outstanding 1.000s 44.137us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_host_csr_hw_reset 2.000s 16.945us 1 1 100.00
spi_host_csr_rw 1.000s 44.181us 1 1 100.00
spi_host_csr_aliasing 2.000s 28.209us 1 1 100.00
spi_host_same_csr_outstanding 1.000s 44.137us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_host_sec_cm 2.000s 44.429us 1 1 100.00
spi_host_tl_intg_err 2.000s 274.168us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_host_tl_intg_err 2.000s 274.168us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_host_upper_range_clkdiv 76.000s 7882.031us 1 1 100.00