Simulation Results: lc_ctrl

 
20/11/2025 16:06:59 sha: e8fccdb json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 88.95
  • line
  • 97.61
  • cond
  • 79.31
  • toggle
  • 83.69
  • fsm
  • 81.4
  • branch
  • 95.8
  • assert
  • 95.99
  • group
  • 88.85
Validation stages
V1
100.00%
V2
87.50%
V2S
66.07%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 2 2 100.00
lc_ctrl_smoke 2.620s 70.320us 2 2 100.00
csr_hw_reset 2 2 100.00
lc_ctrl_csr_hw_reset 0.890s 47.313us 2 2 100.00
csr_rw 2 2 100.00
lc_ctrl_csr_rw 0.870s 14.904us 2 2 100.00
csr_bit_bash 2 2 100.00
lc_ctrl_csr_bit_bash 1.890s 65.735us 2 2 100.00
csr_aliasing 2 2 100.00
lc_ctrl_csr_aliasing 0.980s 207.424us 2 2 100.00
csr_mem_rw_with_rand_reset 2 2 100.00
lc_ctrl_csr_mem_rw_with_rand_reset 1.360s 192.166us 2 2 100.00
regwen_csr_and_corresponding_lockable_csr 4 4 100.00
lc_ctrl_csr_rw 0.870s 14.904us 2 2 100.00
lc_ctrl_csr_aliasing 0.980s 207.424us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
state_post_trans 0 2 0.00
lc_ctrl_state_post_trans 6.160s 751.669us 0 2 0.00
regwen_during_op 2 2 100.00
lc_ctrl_regwen_during_op 6.150s 364.446us 2 2 100.00
rand_wr_claim_transition_if 2 2 100.00
lc_ctrl_claim_transition_if 0.980s 43.792us 2 2 100.00
lc_prog_failure 2 2 100.00
lc_ctrl_prog_failure 2.020s 179.412us 2 2 100.00
lc_state_failure 0 2 0.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_errors 2 2 100.00
lc_ctrl_errors 5.790s 1034.141us 2 2 100.00
security_escalation 10 14 71.43
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_prog_failure 2.020s 179.412us 2 2 100.00
lc_ctrl_errors 5.790s 1034.141us 2 2 100.00
lc_ctrl_security_escalation 7.570s 1169.768us 2 2 100.00
lc_ctrl_jtag_state_failure 24.100s 1140.837us 0 2 0.00
lc_ctrl_jtag_prog_failure 5.960s 479.718us 2 2 100.00
lc_ctrl_jtag_errors 23.440s 2705.005us 2 2 100.00
jtag_access 25 26 96.15
lc_ctrl_jtag_csr_hw_reset 1.520s 216.819us 2 2 100.00
lc_ctrl_jtag_csr_rw 2.110s 90.897us 2 2 100.00
lc_ctrl_jtag_csr_bit_bash 10.010s 7457.794us 2 2 100.00
lc_ctrl_jtag_csr_aliasing 4.450s 320.774us 2 2 100.00
lc_ctrl_jtag_same_csr_outstanding 1.140s 171.081us 2 2 100.00
lc_ctrl_jtag_csr_mem_rw_with_rand_reset 1.830s 875.285us 2 2 100.00
lc_ctrl_jtag_alert_test 0.970s 589.812us 2 2 100.00
lc_ctrl_jtag_smoke 3.500s 1098.266us 2 2 100.00
lc_ctrl_jtag_state_post_trans 8.040s 500.795us 1 2 50.00
lc_ctrl_jtag_prog_failure 5.960s 479.718us 2 2 100.00
lc_ctrl_jtag_errors 23.440s 2705.005us 2 2 100.00
lc_ctrl_jtag_access 3.780s 788.702us 2 2 100.00
lc_ctrl_jtag_regwen_during_op 13.880s 758.727us 2 2 100.00
jtag_priority 2 2 100.00
lc_ctrl_jtag_priority 16.810s 2495.644us 2 2 100.00
lc_ctrl_volatile_unlock 2 2 100.00
lc_ctrl_volatile_unlock_smoke 1.210s 80.068us 2 2 100.00
stress_all 1 2 50.00
lc_ctrl_stress_all 93.000s 19528.065us 1 2 50.00
alert_test 2 2 100.00
lc_ctrl_alert_test 1.230s 43.791us 2 2 100.00
tl_d_oob_addr_access 2 2 100.00
lc_ctrl_tl_errors 1.710s 86.577us 2 2 100.00
tl_d_illegal_access 2 2 100.00
lc_ctrl_tl_errors 1.710s 86.577us 2 2 100.00
tl_d_outstanding_access 8 8 100.00
lc_ctrl_csr_hw_reset 0.890s 47.313us 2 2 100.00
lc_ctrl_csr_rw 0.870s 14.904us 2 2 100.00
lc_ctrl_csr_aliasing 0.980s 207.424us 2 2 100.00
lc_ctrl_same_csr_outstanding 1.180s 25.377us 2 2 100.00
tl_d_partial_access 8 8 100.00
lc_ctrl_csr_hw_reset 0.890s 47.313us 2 2 100.00
lc_ctrl_csr_rw 0.870s 14.904us 2 2 100.00
lc_ctrl_csr_aliasing 0.980s 207.424us 2 2 100.00
lc_ctrl_same_csr_outstanding 1.180s 25.377us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 4 4 100.00
lc_ctrl_tl_intg_err 1.520s 97.162us 2 2 100.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_bus_integrity 2 2 100.00
lc_ctrl_tl_intg_err 1.520s 97.162us 2 2 100.00
sec_cm_transition_config_regwen 2 2 100.00
lc_ctrl_regwen_during_op 6.150s 364.446us 2 2 100.00
sec_cm_manuf_state_sparse 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_transition_ctr_sparse 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_manuf_state_bkgn_chk 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_transition_ctr_bkgn_chk 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_state_config_sparse 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_main_fsm_sparse 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_kmac_fsm_sparse 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_main_fsm_local_esc 2 4 50.00
lc_ctrl_state_failure 5.410s 173.629us 0 2 0.00
lc_ctrl_sec_cm 10.190s 430.651us 2 2 100.00
sec_cm_main_fsm_global_esc 2 2 100.00
lc_ctrl_security_escalation 7.570s 1169.768us 2 2 100.00
sec_cm_main_ctrl_flow_consistency 1 4 25.00
lc_ctrl_state_post_trans 6.160s 751.669us 0 2 0.00
lc_ctrl_jtag_state_post_trans 8.040s 500.795us 1 2 50.00
sec_cm_intersig_mubi 2 2 100.00
lc_ctrl_sec_mubi 7.410s 632.869us 2 2 100.00
sec_cm_token_valid_ctrl_mubi 2 2 100.00
lc_ctrl_sec_mubi 7.410s 632.869us 2 2 100.00
sec_cm_token_digest 2 2 100.00
lc_ctrl_sec_token_digest 8.940s 387.388us 2 2 100.00
sec_cm_token_mux_ctrl_redun 2 2 100.00
lc_ctrl_sec_token_mux 6.320s 584.442us 2 2 100.00
sec_cm_token_valid_mux_redun 2 2 100.00
lc_ctrl_sec_token_mux 6.320s 584.442us 2 2 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 2 0.00
lc_ctrl_stress_all_with_rand_reset 2.570s 105.448us 0 2 0.00