Simulation Results: rstmgr

 
20/11/2025 16:06:59 sha: e8fccdb json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 98.24
  • line
  • 99.19
  • cond
  • 98.07
  • toggle
  • 99.43
  • fsm
  • None
  • branch
  • 99.72
  • assert
  • 97.25
  • group
  • 95.78
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
rstmgr_smoke 1.060s 58.554us 1 1 100.00
csr_hw_reset 1 1 100.00
rstmgr_csr_hw_reset 1.040s 91.181us 1 1 100.00
csr_rw 1 1 100.00
rstmgr_csr_rw 0.800s 36.101us 1 1 100.00
csr_bit_bash 1 1 100.00
rstmgr_csr_bit_bash 3.720s 198.112us 1 1 100.00
csr_aliasing 1 1 100.00
rstmgr_csr_aliasing 1.150s 53.849us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
rstmgr_csr_mem_rw_with_rand_reset 0.960s 65.746us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
rstmgr_csr_rw 0.800s 36.101us 1 1 100.00
rstmgr_csr_aliasing 1.150s 53.849us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reset_stretcher 1 1 100.00
rstmgr_por_stretcher 1.000s 96.541us 1 1 100.00
sw_rst 1 1 100.00
rstmgr_sw_rst 0.880s 40.065us 1 1 100.00
sw_rst_reset_race 1 1 100.00
rstmgr_sw_rst_reset_race 1.050s 87.259us 1 1 100.00
reset_info 1 1 100.00
rstmgr_reset 3.300s 446.366us 1 1 100.00
cpu_info 1 1 100.00
rstmgr_reset 3.300s 446.366us 1 1 100.00
alert_info 1 1 100.00
rstmgr_reset 3.300s 446.366us 1 1 100.00
reset_info_capture 1 1 100.00
rstmgr_reset 3.300s 446.366us 1 1 100.00
stress_all 1 1 100.00
rstmgr_stress_all 18.260s 2942.277us 1 1 100.00
alert_test 1 1 100.00
rstmgr_alert_test 0.830s 35.086us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
rstmgr_tl_errors 1.300s 40.881us 1 1 100.00
tl_d_illegal_access 1 1 100.00
rstmgr_tl_errors 1.300s 40.881us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
rstmgr_csr_hw_reset 1.040s 91.181us 1 1 100.00
rstmgr_csr_rw 0.800s 36.101us 1 1 100.00
rstmgr_csr_aliasing 1.150s 53.849us 1 1 100.00
rstmgr_same_csr_outstanding 0.850s 40.218us 1 1 100.00
tl_d_partial_access 4 4 100.00
rstmgr_csr_hw_reset 1.040s 91.181us 1 1 100.00
rstmgr_csr_rw 0.800s 36.101us 1 1 100.00
rstmgr_csr_aliasing 1.150s 53.849us 1 1 100.00
rstmgr_same_csr_outstanding 0.850s 40.218us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
rstmgr_sec_cm 14.380s 3416.108us 1 1 100.00
rstmgr_tl_intg_err 2.290s 339.016us 1 1 100.00
prim_count_check 1 1 100.00
rstmgr_sec_cm 14.380s 3416.108us 1 1 100.00
prim_fsm_check 1 1 100.00
rstmgr_sec_cm 14.380s 3416.108us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
rstmgr_tl_intg_err 2.290s 339.016us 1 1 100.00
sec_cm_scan_intersig_mubi 1 1 100.00
rstmgr_sec_cm_scan_intersig_mubi 0.990s 59.812us 1 1 100.00
sec_cm_leaf_rst_bkgn_chk 1 1 100.00
rstmgr_leaf_rst_cnsty 3.250s 449.209us 1 1 100.00
sec_cm_leaf_rst_shadow 1 1 100.00
rstmgr_leaf_rst_shadow_attack 1.830s 292.128us 1 1 100.00
sec_cm_leaf_fsm_sparse 1 1 100.00
rstmgr_sec_cm 14.380s 3416.108us 1 1 100.00
sec_cm_sw_rst_config_regwen 1 1 100.00
rstmgr_csr_rw 0.800s 36.101us 1 1 100.00
sec_cm_dump_ctrl_config_regwen 1 1 100.00
rstmgr_csr_rw 0.800s 36.101us 1 1 100.00