Simulation Results: spi_host

 
20/11/2025 16:06:59 sha: e8fccdb json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 95.77
  • block
  • 96.82
  • branch
  • 93.35
  • statement
  • 98.69
  • expression
  • 92.61
  • toggle
  • 88.02
  • fsm
  • 100.0
  • assertion
  • 92.71
  • covergroup
  • 87.92
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_host_smoke 19.000s 2732.057us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_host_csr_hw_reset 2.000s 55.737us 1 1 100.00
csr_rw 1 1 100.00
spi_host_csr_rw 2.000s 17.455us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_host_csr_bit_bash 2.000s 35.439us 1 1 100.00
csr_aliasing 1 1 100.00
spi_host_csr_aliasing 2.000s 147.617us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_host_csr_mem_rw_with_rand_reset 1.000s 157.174us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_host_csr_rw 2.000s 17.455us 1 1 100.00
spi_host_csr_aliasing 2.000s 147.617us 1 1 100.00
mem_walk 1 1 100.00
spi_host_mem_walk 1.000s 29.544us 1 1 100.00
mem_partial_access 1 1 100.00
spi_host_mem_partial_access 1.000s 53.618us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
performance 1 1 100.00
spi_host_performance 2.000s 32.774us 1 1 100.00
error_event_intr 3 3 100.00
spi_host_overflow_underflow 1.000s 526.469us 1 1 100.00
spi_host_error_cmd 1.000s 31.709us 1 1 100.00
spi_host_event 8.000s 810.898us 1 1 100.00
clock_rate 1 1 100.00
spi_host_speed 2.000s 61.887us 1 1 100.00
speed 1 1 100.00
spi_host_speed 2.000s 61.887us 1 1 100.00
chip_select_timing 1 1 100.00
spi_host_speed 2.000s 61.887us 1 1 100.00
sw_reset 1 1 100.00
spi_host_sw_reset 4.000s 682.637us 1 1 100.00
passthrough_mode 1 1 100.00
spi_host_passthrough_mode 2.000s 31.151us 1 1 100.00
cpol_cpha 1 1 100.00
spi_host_speed 2.000s 61.887us 1 1 100.00
full_cycle 1 1 100.00
spi_host_speed 2.000s 61.887us 1 1 100.00
duplex 1 1 100.00
spi_host_smoke 19.000s 2732.057us 1 1 100.00
tx_rx_only 1 1 100.00
spi_host_smoke 19.000s 2732.057us 1 1 100.00
stress_all 1 1 100.00
spi_host_stress_all 3.000s 95.576us 1 1 100.00
spien 1 1 100.00
spi_host_spien 3.000s 489.655us 1 1 100.00
stall 1 1 100.00
spi_host_status_stall 44.000s 4450.687us 1 1 100.00
Idlecsbactive 1 1 100.00
spi_host_idlecsbactive 3.000s 683.132us 1 1 100.00
data_fifo_status 1 1 100.00
spi_host_overflow_underflow 1.000s 526.469us 1 1 100.00
alert_test 1 1 100.00
spi_host_alert_test 2.000s 15.703us 1 1 100.00
intr_test 1 1 100.00
spi_host_intr_test 1.000s 31.346us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_host_tl_errors 2.000s 69.715us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_host_tl_errors 2.000s 69.715us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_host_csr_hw_reset 2.000s 55.737us 1 1 100.00
spi_host_csr_rw 2.000s 17.455us 1 1 100.00
spi_host_csr_aliasing 2.000s 147.617us 1 1 100.00
spi_host_same_csr_outstanding 2.000s 106.386us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_host_csr_hw_reset 2.000s 55.737us 1 1 100.00
spi_host_csr_rw 2.000s 17.455us 1 1 100.00
spi_host_csr_aliasing 2.000s 147.617us 1 1 100.00
spi_host_same_csr_outstanding 2.000s 106.386us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_host_sec_cm 2.000s 45.173us 1 1 100.00
spi_host_tl_intg_err 1.000s 109.923us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_host_tl_intg_err 1.000s 109.923us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_host_upper_range_clkdiv 233.000s 6996.042us 1 1 100.00