Simulation Results: ac_range_check

 
24/11/2025 16:08:31 sha: e65c354 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 96.62
  • block
  • 99.21
  • branch
  • 98.35
  • statement
  • 99.94
  • expression
  • 99.15
  • toggle
  • 80.91
  • fsm
  • None
  • assertion
  • 97.63
  • covergroup
  • 57.84
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 29.000s 1855.161us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 50.000s 2531.876us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 2.000s 21.327us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 2.000s 43.321us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 45.000s 22227.910us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 14.000s 701.271us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 2.000s 335.652us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 2.000s 43.321us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 701.271us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 2.000s 236.386us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 30.000s 512.996us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 143.000s 30546.586us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 2.000s 17.170us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 2.000s 146.387us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 2.000s 62.420us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 2.000s 62.420us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 21.327us 1 1 100.00
ac_range_check_csr_rw 2.000s 43.321us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 701.271us 1 1 100.00
ac_range_check_same_csr_outstanding 3.000s 94.826us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 21.327us 1 1 100.00
ac_range_check_csr_rw 2.000s 43.321us 1 1 100.00
ac_range_check_csr_aliasing 14.000s 701.271us 1 1 100.00
ac_range_check_same_csr_outstanding 3.000s 94.826us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 1581.387us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 1581.387us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 1581.387us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 14.000s 1581.387us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 87.000s 3858.400us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 1.000s 187.003us 1 1 100.00
ac_range_check_tl_intg_err 9.000s 231.395us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 198.000s 18628.818us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 31.000s 5422.752us 1 1 100.00