| host_error_intr |
0 |
1 |
0.00 |
|
i2c_host_error_intr |
2.050s |
171.951us |
0 |
1 |
0.00
|
| host_stress_all |
0 |
1 |
0.00 |
|
i2c_host_stress_all |
1.560s |
510.486us |
0 |
1 |
0.00
|
| host_maxperf |
1 |
1 |
100.00 |
|
i2c_host_perf |
339.660s |
12326.746us |
1 |
1 |
100.00
|
| host_override |
1 |
1 |
100.00 |
|
i2c_host_override |
0.770s |
27.507us |
1 |
1 |
100.00
|
| host_fifo_watermark |
1 |
1 |
100.00 |
|
i2c_host_fifo_watermark |
55.330s |
3367.854us |
1 |
1 |
100.00
|
| host_fifo_overflow |
1 |
1 |
100.00 |
|
i2c_host_fifo_overflow |
69.780s |
12825.661us |
1 |
1 |
100.00
|
| host_fifo_reset |
3 |
3 |
100.00 |
|
i2c_host_fifo_reset_fmt |
0.990s |
412.783us |
1 |
1 |
100.00
|
|
i2c_host_fifo_fmt_empty |
4.080s |
1098.409us |
1 |
1 |
100.00
|
|
i2c_host_fifo_reset_rx |
6.010s |
182.144us |
1 |
1 |
100.00
|
| host_fifo_full |
1 |
1 |
100.00 |
|
i2c_host_fifo_full |
54.690s |
14217.894us |
1 |
1 |
100.00
|
| host_timeout |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
7.920s |
676.845us |
1 |
1 |
100.00
|
| i2c_host_mode_toggle |
0 |
1 |
0.00 |
|
i2c_host_mode_toggle |
0.690s |
54.036us |
0 |
1 |
0.00
|
| target_glitch |
0 |
1 |
0.00 |
|
i2c_target_glitch |
2.410s |
495.317us |
0 |
1 |
0.00
|
| target_stress_all |
1 |
1 |
100.00 |
|
i2c_target_stress_all |
297.860s |
32098.237us |
1 |
1 |
100.00
|
| target_maxperf |
1 |
1 |
100.00 |
|
i2c_target_perf |
3.990s |
3152.398us |
1 |
1 |
100.00
|
| target_fifo_empty |
2 |
2 |
100.00 |
|
i2c_target_stress_rd |
40.100s |
7711.336us |
1 |
1 |
100.00
|
|
i2c_target_intr_smoke |
3.310s |
747.298us |
1 |
1 |
100.00
|
| target_fifo_reset |
2 |
2 |
100.00 |
|
i2c_target_fifo_reset_acq |
0.930s |
512.059us |
1 |
1 |
100.00
|
|
i2c_target_fifo_reset_tx |
1.150s |
277.549us |
1 |
1 |
100.00
|
| target_fifo_full |
3 |
3 |
100.00 |
|
i2c_target_stress_wr |
15.900s |
12569.934us |
1 |
1 |
100.00
|
|
i2c_target_stress_rd |
40.100s |
7711.336us |
1 |
1 |
100.00
|
|
i2c_target_intr_stress_wr |
7.160s |
12209.472us |
1 |
1 |
100.00
|
| target_timeout |
1 |
1 |
100.00 |
|
i2c_target_timeout |
4.460s |
1192.461us |
1 |
1 |
100.00
|
| target_clock_stretch |
1 |
1 |
100.00 |
|
i2c_target_stretch |
17.870s |
1818.139us |
1 |
1 |
100.00
|
| bad_address |
1 |
1 |
100.00 |
|
i2c_target_bad_addr |
3.780s |
2297.380us |
1 |
1 |
100.00
|
| target_mode_glitch |
0 |
1 |
0.00 |
|
i2c_target_hrst |
18.810s |
10280.047us |
0 |
1 |
0.00
|
| target_fifo_watermark |
2 |
2 |
100.00 |
|
i2c_target_fifo_watermarks_acq |
2.020s |
1514.485us |
1 |
1 |
100.00
|
|
i2c_target_fifo_watermarks_tx |
0.950s |
467.821us |
1 |
1 |
100.00
|
| host_mode_config_perf |
2 |
2 |
100.00 |
|
i2c_host_perf |
339.660s |
12326.746us |
1 |
1 |
100.00
|
|
i2c_host_perf_precise |
4.360s |
1571.751us |
1 |
1 |
100.00
|
| host_mode_clock_stretching |
1 |
1 |
100.00 |
|
i2c_host_stretch_timeout |
7.920s |
676.845us |
1 |
1 |
100.00
|
| target_mode_tx_stretch_ctrl |
1 |
1 |
100.00 |
|
i2c_target_tx_stretch_ctrl |
3.760s |
467.593us |
1 |
1 |
100.00
|
| target_mode_nack_generation |
3 |
3 |
100.00 |
|
i2c_target_nack_acqfull |
2.070s |
633.483us |
1 |
1 |
100.00
|
|
i2c_target_nack_acqfull_addr |
1.680s |
931.965us |
1 |
1 |
100.00
|
|
i2c_target_nack_txstretch |
1.390s |
162.960us |
1 |
1 |
100.00
|
| host_mode_halt_on_nak |
1 |
1 |
100.00 |
|
i2c_host_may_nack |
21.180s |
3056.278us |
1 |
1 |
100.00
|
| target_mode_smbus_maxlen |
1 |
1 |
100.00 |
|
i2c_target_smbus_maxlen |
1.950s |
976.826us |
1 |
1 |
100.00
|
| alert_test |
1 |
1 |
100.00 |
|
i2c_alert_test |
0.580s |
42.736us |
1 |
1 |
100.00
|
| intr_test |
1 |
1 |
100.00 |
|
i2c_intr_test |
0.820s |
20.526us |
1 |
1 |
100.00
|
| tl_d_oob_addr_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.690s |
118.102us |
1 |
1 |
100.00
|
| tl_d_illegal_access |
1 |
1 |
100.00 |
|
i2c_tl_errors |
1.690s |
118.102us |
1 |
1 |
100.00
|
| tl_d_outstanding_access |
4 |
4 |
100.00 |
|
i2c_csr_hw_reset |
0.950s |
21.891us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.920s |
51.615us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.680s |
43.132us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
1.080s |
560.931us |
1 |
1 |
100.00
|
| tl_d_partial_access |
4 |
4 |
100.00 |
|
i2c_csr_hw_reset |
0.950s |
21.891us |
1 |
1 |
100.00
|
|
i2c_csr_rw |
0.920s |
51.615us |
1 |
1 |
100.00
|
|
i2c_csr_aliasing |
1.680s |
43.132us |
1 |
1 |
100.00
|
|
i2c_same_csr_outstanding |
1.080s |
560.931us |
1 |
1 |
100.00
|