Simulation Results: lc_ctrl

 
24/11/2025 16:08:31 sha: e65c354 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 88.89
  • line
  • 97.69
  • cond
  • 80.0
  • toggle
  • 83.71
  • fsm
  • 78.57
  • branch
  • 96.34
  • assert
  • 95.99
  • group
  • 89.93
Validation stages
V1
100.00%
V2
90.00%
V2S
71.43%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
lc_ctrl_smoke 1.530s 48.038us 1 1 100.00
csr_hw_reset 1 1 100.00
lc_ctrl_csr_hw_reset 0.850s 21.879us 1 1 100.00
csr_rw 1 1 100.00
lc_ctrl_csr_rw 1.020s 27.699us 1 1 100.00
csr_bit_bash 1 1 100.00
lc_ctrl_csr_bit_bash 1.340s 65.994us 1 1 100.00
csr_aliasing 1 1 100.00
lc_ctrl_csr_aliasing 1.050s 51.682us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
lc_ctrl_csr_mem_rw_with_rand_reset 0.930s 173.085us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
lc_ctrl_csr_rw 1.020s 27.699us 1 1 100.00
lc_ctrl_csr_aliasing 1.050s 51.682us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
state_post_trans 1 1 100.00
lc_ctrl_state_post_trans 5.840s 52.200us 1 1 100.00
regwen_during_op 1 1 100.00
lc_ctrl_regwen_during_op 3.740s 383.669us 1 1 100.00
rand_wr_claim_transition_if 1 1 100.00
lc_ctrl_claim_transition_if 1.090s 10.506us 1 1 100.00
lc_prog_failure 1 1 100.00
lc_ctrl_prog_failure 2.790s 297.032us 1 1 100.00
lc_state_failure 0 1 0.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_errors 1 1 100.00
lc_ctrl_errors 6.870s 912.402us 1 1 100.00
security_escalation 5 7 71.43
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_prog_failure 2.790s 297.032us 1 1 100.00
lc_ctrl_errors 6.870s 912.402us 1 1 100.00
lc_ctrl_security_escalation 9.760s 1627.236us 1 1 100.00
lc_ctrl_jtag_state_failure 22.860s 4342.149us 0 1 0.00
lc_ctrl_jtag_prog_failure 3.940s 732.632us 1 1 100.00
lc_ctrl_jtag_errors 24.620s 2903.236us 1 1 100.00
jtag_access 13 13 100.00
lc_ctrl_jtag_smoke 8.240s 2970.544us 1 1 100.00
lc_ctrl_jtag_state_post_trans 10.310s 531.860us 1 1 100.00
lc_ctrl_jtag_prog_failure 3.940s 732.632us 1 1 100.00
lc_ctrl_jtag_errors 24.620s 2903.236us 1 1 100.00
lc_ctrl_jtag_access 6.360s 542.106us 1 1 100.00
lc_ctrl_jtag_regwen_during_op 6.960s 706.633us 1 1 100.00
lc_ctrl_jtag_csr_hw_reset 1.390s 218.259us 1 1 100.00
lc_ctrl_jtag_csr_rw 2.650s 136.342us 1 1 100.00
lc_ctrl_jtag_csr_bit_bash 3.780s 387.099us 1 1 100.00
lc_ctrl_jtag_csr_aliasing 4.680s 249.598us 1 1 100.00
lc_ctrl_jtag_same_csr_outstanding 1.700s 636.250us 1 1 100.00
lc_ctrl_jtag_csr_mem_rw_with_rand_reset 1.650s 639.151us 1 1 100.00
lc_ctrl_jtag_alert_test 1.080s 43.196us 1 1 100.00
jtag_priority 1 1 100.00
lc_ctrl_jtag_priority 9.720s 2969.857us 1 1 100.00
lc_ctrl_volatile_unlock 1 1 100.00
lc_ctrl_volatile_unlock_smoke 0.910s 13.149us 1 1 100.00
stress_all 0 1 0.00
lc_ctrl_stress_all 11.220s 868.057us 0 1 0.00
alert_test 1 1 100.00
lc_ctrl_alert_test 1.150s 15.294us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
lc_ctrl_tl_errors 3.600s 1667.684us 1 1 100.00
tl_d_illegal_access 1 1 100.00
lc_ctrl_tl_errors 3.600s 1667.684us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
lc_ctrl_csr_hw_reset 0.850s 21.879us 1 1 100.00
lc_ctrl_csr_rw 1.020s 27.699us 1 1 100.00
lc_ctrl_csr_aliasing 1.050s 51.682us 1 1 100.00
lc_ctrl_same_csr_outstanding 1.080s 253.929us 1 1 100.00
tl_d_partial_access 4 4 100.00
lc_ctrl_csr_hw_reset 0.850s 21.879us 1 1 100.00
lc_ctrl_csr_rw 1.020s 27.699us 1 1 100.00
lc_ctrl_csr_aliasing 1.050s 51.682us 1 1 100.00
lc_ctrl_same_csr_outstanding 1.080s 253.929us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
lc_ctrl_tl_intg_err 3.480s 165.063us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
lc_ctrl_tl_intg_err 3.480s 165.063us 1 1 100.00
sec_cm_transition_config_regwen 1 1 100.00
lc_ctrl_regwen_during_op 3.740s 383.669us 1 1 100.00
sec_cm_manuf_state_sparse 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_transition_ctr_sparse 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_manuf_state_bkgn_chk 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_transition_ctr_bkgn_chk 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_state_config_sparse 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_main_fsm_sparse 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_kmac_fsm_sparse 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_main_fsm_local_esc 1 2 50.00
lc_ctrl_state_failure 5.140s 25.518us 0 1 0.00
lc_ctrl_sec_cm 6.020s 783.909us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
lc_ctrl_security_escalation 9.760s 1627.236us 1 1 100.00
sec_cm_main_ctrl_flow_consistency 2 2 100.00
lc_ctrl_state_post_trans 5.840s 52.200us 1 1 100.00
lc_ctrl_jtag_state_post_trans 10.310s 531.860us 1 1 100.00
sec_cm_intersig_mubi 1 1 100.00
lc_ctrl_sec_mubi 8.610s 1430.490us 1 1 100.00
sec_cm_token_valid_ctrl_mubi 1 1 100.00
lc_ctrl_sec_mubi 8.610s 1430.490us 1 1 100.00
sec_cm_token_digest 1 1 100.00
lc_ctrl_sec_token_digest 9.000s 342.409us 1 1 100.00
sec_cm_token_mux_ctrl_redun 1 1 100.00
lc_ctrl_sec_token_mux 7.870s 715.661us 1 1 100.00
sec_cm_token_valid_mux_redun 1 1 100.00
lc_ctrl_sec_token_mux 7.870s 715.661us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
lc_ctrl_stress_all_with_rand_reset 23.290s 5026.640us 0 1 0.00