Simulation Results: spi_device

 
24/11/2025 16:08:31 sha: e65c354 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • score
  • 86.56
  • line
  • 98.69
  • cond
  • 95.78
  • toggle
  • 83.54
  • fsm
  • 80.85
  • branch
  • 97.83
  • assert
  • 94.16
  • group
  • 55.06
Validation stages
V1
100.00%
V2
96.15%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_device_flash_and_tpm 13.520s 1960.703us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_device_csr_hw_reset 1.330s 278.634us 1 1 100.00
csr_rw 1 1 100.00
spi_device_csr_rw 2.220s 198.633us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_device_csr_bit_bash 17.540s 5505.944us 1 1 100.00
csr_aliasing 1 1 100.00
spi_device_csr_aliasing 6.190s 786.700us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_device_csr_mem_rw_with_rand_reset 2.220s 111.937us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_device_csr_rw 2.220s 198.633us 1 1 100.00
spi_device_csr_aliasing 6.190s 786.700us 1 1 100.00
mem_walk 1 1 100.00
spi_device_mem_walk 0.830s 12.204us 1 1 100.00
mem_partial_access 1 1 100.00
spi_device_mem_partial_access 1.930s 22.186us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
csb_read 1 1 100.00
spi_device_csb_read 0.890s 66.826us 1 1 100.00
mem_parity 0 1 0.00
spi_device_mem_parity 0.750s 0.949us 0 1 0.00
mem_cfg 0 1 0.00
spi_device_ram_cfg 0.740s 3.672us 0 1 0.00
tpm_read 1 1 100.00
spi_device_tpm_rw 5.330s 1300.257us 1 1 100.00
tpm_write 1 1 100.00
spi_device_tpm_rw 5.330s 1300.257us 1 1 100.00
tpm_hw_reg 2 2 100.00
spi_device_tpm_read_hw_reg 7.590s 5081.333us 1 1 100.00
spi_device_tpm_sts_read 0.890s 45.150us 1 1 100.00
tpm_fully_random_case 1 1 100.00
spi_device_tpm_all 7.970s 1210.598us 1 1 100.00
pass_cmd_filtering 2 2 100.00
spi_device_pass_cmd_filtering 1.770s 60.863us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
pass_addr_translation 2 2 100.00
spi_device_pass_addr_payload_swap 8.670s 3371.103us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
pass_payload_translation 2 2 100.00
spi_device_pass_addr_payload_swap 8.670s 3371.103us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
cmd_info_slots 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
cmd_read_status 2 2 100.00
spi_device_intercept 1.870s 266.669us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
cmd_read_jedec 2 2 100.00
spi_device_intercept 1.870s 266.669us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
cmd_read_sfdp 2 2 100.00
spi_device_intercept 1.870s 266.669us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
cmd_fast_read 2 2 100.00
spi_device_intercept 1.870s 266.669us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
cmd_read_pipeline 2 2 100.00
spi_device_intercept 1.870s 266.669us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
flash_cmd_upload 1 1 100.00
spi_device_upload 2.310s 1102.135us 1 1 100.00
mailbox_command 1 1 100.00
spi_device_mailbox 15.790s 9064.285us 1 1 100.00
mailbox_cross_outside_command 1 1 100.00
spi_device_mailbox 15.790s 9064.285us 1 1 100.00
mailbox_cross_inside_command 1 1 100.00
spi_device_mailbox 15.790s 9064.285us 1 1 100.00
cmd_read_buffer 2 2 100.00
spi_device_flash_mode 10.200s 771.657us 1 1 100.00
spi_device_read_buffer_direct 3.510s 957.316us 1 1 100.00
cmd_dummy_cycle 2 2 100.00
spi_device_mailbox 15.790s 9064.285us 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
quad_spi 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
dual_spi 1 1 100.00
spi_device_flash_all 65.170s 19631.026us 1 1 100.00
4b_3b_feature 1 1 100.00
spi_device_cfg_cmd 3.070s 2773.169us 1 1 100.00
write_enable_disable 1 1 100.00
spi_device_cfg_cmd 3.070s 2773.169us 1 1 100.00
TPM_with_flash_or_passthrough_mode 1 1 100.00
spi_device_flash_and_tpm 13.520s 1960.703us 1 1 100.00
tpm_and_flash_trans_with_min_inactive_time 1 1 100.00
spi_device_flash_and_tpm_min_idle 131.470s 19039.531us 1 1 100.00
stress_all 1 1 100.00
spi_device_stress_all 1.200s 136.994us 1 1 100.00
alert_test 1 1 100.00
spi_device_alert_test 0.700s 21.104us 1 1 100.00
intr_test 1 1 100.00
spi_device_intr_test 1.000s 71.674us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_device_tl_errors 4.170s 150.271us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_device_tl_errors 4.170s 150.271us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_device_csr_hw_reset 1.330s 278.634us 1 1 100.00
spi_device_csr_rw 2.220s 198.633us 1 1 100.00
spi_device_csr_aliasing 6.190s 786.700us 1 1 100.00
spi_device_same_csr_outstanding 1.620s 26.194us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_device_csr_hw_reset 1.330s 278.634us 1 1 100.00
spi_device_csr_rw 2.220s 198.633us 1 1 100.00
spi_device_csr_aliasing 6.190s 786.700us 1 1 100.00
spi_device_same_csr_outstanding 1.620s 26.194us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_device_tl_intg_err 11.640s 13177.042us 1 1 100.00
spi_device_sec_cm 0.920s 43.880us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_device_tl_intg_err 11.640s 13177.042us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_device_flash_mode_ignore_cmds 59.560s 14945.904us 1 1 100.00