Simulation Results: ac_range_check

 
25/11/2025 16:03:05 sha: 3424e7f json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 96.5
  • block
  • 99.21
  • branch
  • 98.35
  • statement
  • 99.94
  • expression
  • 99.19
  • toggle
  • 80.73
  • fsm
  • None
  • assertion
  • 89.05
  • covergroup
  • 57.79
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 41.000s 2983.305us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 42.000s 602.070us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 4.000s 36.745us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 4.000s 182.935us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 30.000s 504.011us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 21.000s 20364.603us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 3.000s 45.998us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 4.000s 182.935us 1 1 100.00
ac_range_check_csr_aliasing 21.000s 20364.603us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 9.000s 155.409us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 32.000s 6347.847us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 120.000s 24237.251us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 2.000s 107.308us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 3.000s 46.167us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 3.000s 355.741us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 3.000s 355.741us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 4.000s 36.745us 1 1 100.00
ac_range_check_csr_rw 4.000s 182.935us 1 1 100.00
ac_range_check_csr_aliasing 21.000s 20364.603us 1 1 100.00
ac_range_check_same_csr_outstanding 5.000s 602.273us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 4.000s 36.745us 1 1 100.00
ac_range_check_csr_rw 4.000s 182.935us 1 1 100.00
ac_range_check_csr_aliasing 21.000s 20364.603us 1 1 100.00
ac_range_check_same_csr_outstanding 5.000s 602.273us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1570.928us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1570.928us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1570.928us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 12.000s 1570.928us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 93.000s 15305.876us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 4.000s 16.270us 1 1 100.00
ac_range_check_tl_intg_err 9.000s 3298.321us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 217.000s 6356.315us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 35.000s 1164.568us 1 1 100.00