Simulation Results: spi_host

 
25/11/2025 16:03:05 sha: 3424e7f json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • score
  • 95.97
  • block
  • 96.82
  • branch
  • 93.35
  • statement
  • 98.69
  • expression
  • 93.02
  • toggle
  • 88.02
  • fsm
  • 100.0
  • assertion
  • 95.21
  • covergroup
  • 88.33
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
spi_host_smoke 10.000s 935.510us 1 1 100.00
csr_hw_reset 1 1 100.00
spi_host_csr_hw_reset 2.000s 66.246us 1 1 100.00
csr_rw 1 1 100.00
spi_host_csr_rw 2.000s 78.355us 1 1 100.00
csr_bit_bash 1 1 100.00
spi_host_csr_bit_bash 3.000s 208.905us 1 1 100.00
csr_aliasing 1 1 100.00
spi_host_csr_aliasing 2.000s 54.623us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
spi_host_csr_mem_rw_with_rand_reset 1.000s 40.785us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
spi_host_csr_rw 2.000s 78.355us 1 1 100.00
spi_host_csr_aliasing 2.000s 54.623us 1 1 100.00
mem_walk 1 1 100.00
spi_host_mem_walk 2.000s 57.775us 1 1 100.00
mem_partial_access 1 1 100.00
spi_host_mem_partial_access 2.000s 199.386us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
performance 1 1 100.00
spi_host_performance 2.000s 45.577us 1 1 100.00
error_event_intr 3 3 100.00
spi_host_overflow_underflow 3.000s 160.375us 1 1 100.00
spi_host_error_cmd 2.000s 47.656us 1 1 100.00
spi_host_event 26.000s 3645.460us 1 1 100.00
clock_rate 1 1 100.00
spi_host_speed 5.000s 428.570us 1 1 100.00
speed 1 1 100.00
spi_host_speed 5.000s 428.570us 1 1 100.00
chip_select_timing 1 1 100.00
spi_host_speed 5.000s 428.570us 1 1 100.00
sw_reset 1 1 100.00
spi_host_sw_reset 3.000s 102.099us 1 1 100.00
passthrough_mode 1 1 100.00
spi_host_passthrough_mode 1.000s 87.469us 1 1 100.00
cpol_cpha 1 1 100.00
spi_host_speed 5.000s 428.570us 1 1 100.00
full_cycle 1 1 100.00
spi_host_speed 5.000s 428.570us 1 1 100.00
duplex 1 1 100.00
spi_host_smoke 10.000s 935.510us 1 1 100.00
tx_rx_only 1 1 100.00
spi_host_smoke 10.000s 935.510us 1 1 100.00
stress_all 1 1 100.00
spi_host_stress_all 16.000s 1991.499us 1 1 100.00
spien 1 1 100.00
spi_host_spien 4.000s 1520.479us 1 1 100.00
stall 1 1 100.00
spi_host_status_stall 49.000s 8661.248us 1 1 100.00
Idlecsbactive 1 1 100.00
spi_host_idlecsbactive 2.000s 78.219us 1 1 100.00
data_fifo_status 1 1 100.00
spi_host_overflow_underflow 3.000s 160.375us 1 1 100.00
alert_test 1 1 100.00
spi_host_alert_test 1.000s 17.612us 1 1 100.00
intr_test 1 1 100.00
spi_host_intr_test 2.000s 64.652us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
spi_host_tl_errors 2.000s 77.443us 1 1 100.00
tl_d_illegal_access 1 1 100.00
spi_host_tl_errors 2.000s 77.443us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
spi_host_csr_hw_reset 2.000s 66.246us 1 1 100.00
spi_host_csr_rw 2.000s 78.355us 1 1 100.00
spi_host_csr_aliasing 2.000s 54.623us 1 1 100.00
spi_host_same_csr_outstanding 1.000s 18.161us 1 1 100.00
tl_d_partial_access 4 4 100.00
spi_host_csr_hw_reset 2.000s 66.246us 1 1 100.00
spi_host_csr_rw 2.000s 78.355us 1 1 100.00
spi_host_csr_aliasing 2.000s 54.623us 1 1 100.00
spi_host_same_csr_outstanding 1.000s 18.161us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
spi_host_tl_intg_err 1.000s 367.186us 1 1 100.00
spi_host_sec_cm 1.000s 129.261us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
spi_host_tl_intg_err 1.000s 367.186us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
spi_host_upper_range_clkdiv 158.000s 4146.432us 1 1 100.00