Simulation Results: ac_range_check

 
27/11/2025 16:08:38 sha: 8a15de8 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 82.85 %
  • code
  • 93.07 %
  • assert
  • 97.63 %
  • func
  • 57.84 %
  • block
  • 99.21 %
  • line
  • 99.94 %
  • branch
  • 98.35 %
  • toggle
  • 80.91 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 28.000s 1265.583us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 39.000s 1740.734us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 2.000s 452.019us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 3.000s 490.151us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 40.000s 2561.934us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 22.000s 1536.523us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 3.000s 55.630us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 3.000s 490.151us 1 1 100.00
ac_range_check_csr_aliasing 22.000s 1536.523us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 4.000s 81.840us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 24.000s 4163.204us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 98.000s 1857.924us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 2.000s 14.807us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 1.000s 14.326us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 3.000s 331.522us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 3.000s 331.522us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 452.019us 1 1 100.00
ac_range_check_csr_rw 3.000s 490.151us 1 1 100.00
ac_range_check_csr_aliasing 22.000s 1536.523us 1 1 100.00
ac_range_check_same_csr_outstanding 5.000s 246.130us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 452.019us 1 1 100.00
ac_range_check_csr_rw 3.000s 490.151us 1 1 100.00
ac_range_check_csr_aliasing 22.000s 1536.523us 1 1 100.00
ac_range_check_same_csr_outstanding 5.000s 246.130us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 16.000s 914.700us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 16.000s 914.700us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 16.000s 914.700us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 16.000s 914.700us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 88.000s 24464.503us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_sec_cm 2.000s 11.904us 1 1 100.00
ac_range_check_tl_intg_err 10.000s 117.872us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 208.000s 3319.104us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 31.000s 1126.401us 1 1 100.00