Simulation Results: i2c

 
27/11/2025 16:08:38 sha: 8a15de8 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 86.49 %
  • code
  • 81.89 %
  • assert
  • 93.23 %
  • func
  • 84.36 %
  • line
  • 96.60 %
  • branch
  • 92.76 %
  • cond
  • 87.00 %
  • toggle
  • 89.66 %
  • FSM
  • 43.45 %
Validation stages
V1
100.00%
V2
91.84%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 15.530s 1382.521us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 25.170s 1159.074us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.670s 43.393us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.740s 26.879us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 3.270s 1315.740us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 1.100s 54.644us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 0.830s 70.967us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.740s 26.879us 1 1 100.00
i2c_csr_aliasing 1.100s 54.644us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.740s 8.507us 0 1 0.00
host_stress_all 1 1 100.00
i2c_host_stress_all 345.580s 44295.954us 1 1 100.00
host_maxperf 1 1 100.00
i2c_host_perf 105.100s 7497.351us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.920s 77.051us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 81.190s 5662.717us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 82.760s 3961.011us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 0.870s 354.714us 1 1 100.00
i2c_host_fifo_fmt_empty 7.700s 917.317us 1 1 100.00
i2c_host_fifo_reset_rx 4.820s 164.902us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 143.220s 3532.975us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 9.380s 3021.848us 1 1 100.00
i2c_host_mode_toggle 1 1 100.00
i2c_host_mode_toggle 1.280s 313.058us 1 1 100.00
target_glitch 0 1 0.00
i2c_target_glitch 2.680s 1086.024us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 60.920s 48269.796us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 4.630s 16337.516us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 24.110s 3540.923us 1 1 100.00
i2c_target_intr_smoke 4.700s 4183.582us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 1.530s 601.945us 1 1 100.00
i2c_target_fifo_reset_tx 1.150s 266.059us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 40.540s 47902.810us 1 1 100.00
i2c_target_stress_rd 24.110s 3540.923us 1 1 100.00
i2c_target_intr_stress_wr 20.690s 11588.986us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 5.460s 1394.274us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 10.600s 2812.209us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 5.180s 5065.054us 1 1 100.00
target_mode_glitch 0 1 0.00
i2c_target_hrst 18.980s 10015.275us 0 1 0.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 1.930s 1737.031us 1 1 100.00
i2c_target_fifo_watermarks_tx 1.210s 132.221us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 105.100s 7497.351us 1 1 100.00
i2c_host_perf_precise 12.020s 2506.672us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 9.380s 3021.848us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 5.210s 513.197us 1 1 100.00
target_mode_nack_generation 2 3 66.67
i2c_target_nack_acqfull 2.110s 855.223us 1 1 100.00
i2c_target_nack_acqfull_addr 2.020s 514.903us 1 1 100.00
i2c_target_nack_txstretch 1.230s 2533.111us 0 1 0.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 3.530s 855.258us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.690s 2281.946us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.620s 16.737us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.770s 18.782us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.720s 163.075us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.720s 163.075us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.670s 43.393us 1 1 100.00
i2c_csr_rw 0.740s 26.879us 1 1 100.00
i2c_csr_aliasing 1.100s 54.644us 1 1 100.00
i2c_same_csr_outstanding 0.780s 34.279us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.670s 43.393us 1 1 100.00
i2c_csr_rw 0.740s 26.879us 1 1 100.00
i2c_csr_aliasing 1.100s 54.644us 1 1 100.00
i2c_same_csr_outstanding 0.780s 34.279us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_sec_cm 0.840s 125.883us 1 1 100.00
i2c_tl_intg_err 1.260s 76.982us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.260s 76.982us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 5.790s 581.747us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 2.560s 2495.853us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 5.130s 1834.670us 0 1 0.00