Simulation Results: keymgr

 
27/11/2025 16:08:38 sha: 8a15de8 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 80.95 %
  • code
  • 92.54 %
  • assert
  • 97.49 %
  • func
  • 52.82 %
  • line
  • 98.54 %
  • branch
  • 97.31 %
  • cond
  • 92.46 %
  • toggle
  • 90.66 %
  • FSM
  • 83.72 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 2.100s 61.489us 1 1 100.00
random 1 1 100.00
keymgr_random 9.490s 572.944us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.170s 25.682us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.880s 21.838us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 19.750s 2562.657us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 7.360s 501.181us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.210s 34.035us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.880s 21.838us 1 1 100.00
keymgr_csr_aliasing 7.360s 501.181us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 3.230s 60.737us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 10.140s 5245.814us 1 1 100.00
keymgr_sideload_kmac 2.080s 80.415us 1 1 100.00
keymgr_sideload_aes 1.750s 40.140us 1 1 100.00
keymgr_sideload_otbn 40.580s 7811.885us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 3.260s 167.504us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 1.620s 240.759us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.380s 372.163us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 3.980s 648.327us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.020s 61.006us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.200s 55.080us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 3.370s 116.323us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.990s 12.555us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.680s 54.880us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.760s 120.479us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.760s 120.479us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.170s 25.682us 1 1 100.00
keymgr_csr_rw 0.880s 21.838us 1 1 100.00
keymgr_csr_aliasing 7.360s 501.181us 1 1 100.00
keymgr_same_csr_outstanding 1.350s 170.957us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.170s 25.682us 1 1 100.00
keymgr_csr_rw 0.880s 21.838us 1 1 100.00
keymgr_csr_aliasing 7.360s 501.181us 1 1 100.00
keymgr_same_csr_outstanding 1.350s 170.957us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
keymgr_tl_intg_err 5.040s 258.943us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.200s 225.324us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.200s 225.324us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.200s 225.324us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.200s 225.324us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 7.000s 282.771us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 5.040s 258.943us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.200s 225.324us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 3.230s 60.737us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_random 9.490s 572.944us 1 1 100.00
keymgr_csr_rw 0.880s 21.838us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_random 9.490s 572.944us 1 1 100.00
keymgr_csr_rw 0.880s 21.838us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_random 9.490s 572.944us 1 1 100.00
keymgr_csr_rw 0.880s 21.838us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 1.620s 240.759us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.020s 61.006us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.020s 61.006us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 9.490s 572.944us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.160s 104.439us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.470s 122.514us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 1.620s 240.759us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.470s 122.514us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.470s 122.514us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.470s 122.514us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.120s 1187.666us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.470s 122.514us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
keymgr_stress_all_with_rand_reset 2.690s 1941.321us 0 1 0.00