| mem_integrity |
0 |
2 |
0.00 |
|
otbn_imem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_dmem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| internal_integrity |
0 |
4 |
0.00 |
|
otbn_alu_bignum_mod_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_controller_ispr_rdata_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_mac_bignum_acc_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_urnd_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| illegal_bus_access |
0 |
1 |
0.00 |
|
otbn_illegal_mem_acc |
0.000s |
0.000us |
0 |
1 |
0.00
|
| otbn_mem_gnt_acc_err |
0 |
1 |
0.00 |
|
otbn_mem_gnt_acc_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| otbn_non_sec_partial_wipe |
0 |
1 |
0.00 |
|
otbn_partial_wipe |
0.000s |
0.000us |
0 |
1 |
0.00
|
| tl_intg_err |
0 |
2 |
0.00 |
|
otbn_tl_intg_err |
11.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| passthru_mem_tl_intg_err |
0 |
1 |
0.00 |
|
otbn_passthru_mem_tl_intg_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| prim_fsm_check |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| prim_count_check |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_mem_scramble |
0 |
1 |
0.00 |
|
otbn_smoke |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_data_mem_integrity |
0 |
1 |
0.00 |
|
otbn_dmem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_instruction_mem_integrity |
0 |
1 |
0.00 |
|
otbn_imem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_bus_integrity |
0 |
1 |
0.00 |
|
otbn_tl_intg_err |
11.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_controller_fsm_global_esc |
0 |
1 |
0.00 |
|
otbn_escalate |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_controller_fsm_local_esc |
0 |
5 |
0.00 |
|
otbn_imem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_dmem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_zero_state_err_urnd |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_illegal_mem_acc |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_controller_fsm_sparse |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_scramble_key_sideload |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_scramble_ctrl_fsm_local_esc |
0 |
5 |
0.00 |
|
otbn_imem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_dmem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_zero_state_err_urnd |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_illegal_mem_acc |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_scramble_ctrl_fsm_sparse |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_start_stop_ctrl_fsm_global_esc |
0 |
1 |
0.00 |
|
otbn_escalate |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_start_stop_ctrl_fsm_local_esc |
0 |
5 |
0.00 |
|
otbn_imem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_dmem_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_zero_state_err_urnd |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_illegal_mem_acc |
0.000s |
0.000us |
0 |
1 |
0.00
|
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_start_stop_ctrl_fsm_sparse |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_data_reg_sw_sca |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_ctrl_redun |
0 |
1 |
0.00 |
|
otbn_ctrl_redun |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_pc_ctrl_flow_redun |
0 |
1 |
0.00 |
|
otbn_pc_ctrl_flow_redun |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_rnd_bus_consistency |
0 |
1 |
0.00 |
|
otbn_rnd_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_rnd_rng_digest |
0 |
1 |
0.00 |
|
otbn_rnd_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_rf_base_data_reg_sw_integrity |
0 |
1 |
0.00 |
|
otbn_rf_base_intg_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_rf_base_data_reg_sw_glitch_detect |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_stack_wr_ptr_ctr_redun |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_rf_bignum_data_reg_sw_integrity |
0 |
1 |
0.00 |
|
otbn_rf_bignum_intg_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_rf_bignum_data_reg_sw_glitch_detect |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_loop_stack_ctr_redun |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_loop_stack_addr_integrity |
0 |
1 |
0.00 |
|
otbn_stack_addr_integ_chk |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_call_stack_addr_integrity |
0 |
1 |
0.00 |
|
otbn_stack_addr_integ_chk |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_start_stop_ctrl_state_consistency |
0 |
1 |
0.00 |
|
otbn_sec_wipe_err |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_data_mem_sec_wipe |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_instruction_mem_sec_wipe |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_data_reg_sw_sec_wipe |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_write_mem_integrity |
0 |
1 |
0.00 |
|
otbn_multi |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_ctrl_flow_count |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_ctrl_flow_sca |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_data_mem_sw_noaccess |
0 |
1 |
0.00 |
|
otbn_sw_no_acc |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_key_sideload |
0 |
1 |
0.00 |
|
otbn_single |
0.000s |
0.000us |
0 |
1 |
0.00
|
| sec_cm_tlul_fifo_ctr_redun |
0 |
1 |
0.00 |
|
otbn_sec_cm |
0.000s |
0.000us |
0 |
1 |
0.00
|