Simulation Results: ac_range_check

 
01/12/2025 16:07:45 sha: a49b553 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 82.90 %
  • code
  • 93.13 %
  • assert
  • 97.63 %
  • func
  • 57.93 %
  • block
  • 99.21 %
  • line
  • 99.94 %
  • branch
  • 98.35 %
  • toggle
  • 81.09 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
unmapped
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_smoke 1 1 100.00
ac_range_check_smoke 20.000s 1385.522us 1 1 100.00
ac_range_check_smoke_racl 1 1 100.00
ac_range_check_smoke_racl 51.000s 8321.025us 1 1 100.00
csr_hw_reset 1 1 100.00
ac_range_check_csr_hw_reset 2.000s 161.195us 1 1 100.00
csr_rw 1 1 100.00
ac_range_check_csr_rw 2.000s 78.132us 1 1 100.00
csr_bit_bash 1 1 100.00
ac_range_check_csr_bit_bash 21.000s 493.696us 1 1 100.00
csr_aliasing 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1045.112us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
ac_range_check_csr_mem_rw_with_rand_reset 3.000s 32.691us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
ac_range_check_csr_rw 2.000s 78.132us 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1045.112us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
ac_range_check_lock_range 1 1 100.00
ac_range_check_lock_range 4.000s 57.807us 1 1 100.00
ac_range_bypass_enable 1 1 100.00
ac_range_check_bypass 25.000s 6244.649us 1 1 100.00
stress_all 1 1 100.00
ac_range_check_stress_all 175.000s 38331.262us 1 1 100.00
alert_test 1 1 100.00
ac_range_check_alert_test 2.000s 53.746us 1 1 100.00
intr_test 1 1 100.00
ac_range_check_intr_test 1.000s 58.362us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
ac_range_check_tl_errors 12.000s 138.986us 1 1 100.00
tl_d_illegal_access 1 1 100.00
ac_range_check_tl_errors 12.000s 138.986us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 161.195us 1 1 100.00
ac_range_check_csr_rw 2.000s 78.132us 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1045.112us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 245.945us 1 1 100.00
tl_d_partial_access 4 4 100.00
ac_range_check_csr_hw_reset 2.000s 161.195us 1 1 100.00
ac_range_check_csr_rw 2.000s 78.132us 1 1 100.00
ac_range_check_csr_aliasing 19.000s 1045.112us 1 1 100.00
ac_range_check_same_csr_outstanding 4.000s 245.945us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
ac_range_check_shadow_reg_errors 18.000s 918.007us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
ac_range_check_shadow_reg_errors 18.000s 918.007us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
ac_range_check_shadow_reg_errors 18.000s 918.007us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
ac_range_check_shadow_reg_errors 18.000s 918.007us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
ac_range_check_shadow_reg_errors_with_csr_rw 85.000s 4455.203us 1 1 100.00
tl_intg_err 2 2 100.00
ac_range_check_tl_intg_err 19.000s 302.123us 1 1 100.00
ac_range_check_sec_cm 1.000s 58.628us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
ac_range_check_stress_all_with_rand_reset 172.000s 2072.130us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
Unmapped 1 1 100.00
ac_range_check_smoke_high_threshold 30.000s 1514.559us 1 1 100.00