Simulation Results: keymgr

 
01/12/2025 16:07:45 sha: a49b553 json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 79.83 %
  • code
  • 93.20 %
  • assert
  • 97.49 %
  • func
  • 48.80 %
  • line
  • 98.70 %
  • branch
  • 97.76 %
  • cond
  • 93.05 %
  • toggle
  • 90.43 %
  • FSM
  • 86.05 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 26.020s 4225.535us 1 1 100.00
random 1 1 100.00
keymgr_random 4.040s 217.998us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 0.840s 19.427us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.400s 29.404us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 8.300s 1009.033us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 5.940s 528.897us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.030s 59.871us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.400s 29.404us 1 1 100.00
keymgr_csr_aliasing 5.940s 528.897us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 3.180s 73.170us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.740s 190.541us 1 1 100.00
keymgr_sideload_kmac 3.690s 183.202us 1 1 100.00
keymgr_sideload_aes 2.450s 149.518us 1 1 100.00
keymgr_sideload_otbn 2.620s 300.404us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 3.340s 122.558us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 1.810s 128.096us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 1.980s 130.450us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 2.510s 73.833us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 1.750s 35.717us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.860s 194.862us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 3.950s 1400.901us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.700s 67.076us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.680s 59.191us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.450s 233.342us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.450s 233.342us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 0.840s 19.427us 1 1 100.00
keymgr_csr_rw 1.400s 29.404us 1 1 100.00
keymgr_csr_aliasing 5.940s 528.897us 1 1 100.00
keymgr_same_csr_outstanding 1.300s 52.194us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 0.840s 19.427us 1 1 100.00
keymgr_csr_rw 1.400s 29.404us 1 1 100.00
keymgr_csr_aliasing 5.940s 528.897us 1 1 100.00
keymgr_same_csr_outstanding 1.300s 52.194us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 5.080s 1970.837us 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 1.660s 143.865us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 1.660s 143.865us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 1.660s 143.865us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 1.660s 143.865us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 5.840s 420.448us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 5.080s 1970.837us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 1.660s 143.865us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 3.180s 73.170us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 1.400s 29.404us 1 1 100.00
keymgr_random 4.040s 217.998us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 1.400s 29.404us 1 1 100.00
keymgr_random 4.040s 217.998us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 1.400s 29.404us 1 1 100.00
keymgr_random 4.040s 217.998us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 1.810s 128.096us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 1.750s 35.717us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 1.750s 35.717us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 4.040s 217.998us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 5.860s 906.679us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 2.260s 51.769us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 1.810s 128.096us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.260s 51.769us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.260s 51.769us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 2.260s 51.769us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.100s 1406.189us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 2.260s 51.769us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
keymgr_stress_all_with_rand_reset 5.450s 462.322us 0 1 0.00