Simulation Results: aes

 
02/12/2025 16:09:27 sha: 06584dc json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 89.78 %
  • code
  • 94.81 %
  • assert
  • 98.06 %
  • func
  • 76.46 %
  • block
  • 95.82 %
  • line
  • 97.14 %
  • branch
  • 90.78 %
  • toggle
  • 97.99 %
  • FSM
  • 93.33 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 84.298us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 69.015us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 269.714us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 1.000s 135.681us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 4.000s 131.888us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 3.000s 296.199us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 155.235us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 1.000s 135.681us 1 1 100.00
aes_csr_aliasing 3.000s 296.199us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 69.015us 1 1 100.00
aes_config_error 3.000s 167.147us 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 69.015us 1 1 100.00
aes_config_error 3.000s 167.147us 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 77.620us 1 1 100.00
aes_b2b 8.000s 145.061us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 69.015us 1 1 100.00
aes_config_error 3.000s 167.147us 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
aes_alert_reset 5.000s 102.067us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 101.072us 1 1 100.00
aes_config_error 3.000s 167.147us 1 1 100.00
aes_alert_reset 5.000s 102.067us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 108.137us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 7.000s 557.383us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 5.000s 102.067us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 77.620us 1 1 100.00
aes_sideload 3.000s 93.509us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 3.000s 108.175us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 15.000s 1183.607us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 94.969us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 3.000s 219.792us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 3.000s 219.792us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 269.714us 1 1 100.00
aes_csr_rw 1.000s 135.681us 1 1 100.00
aes_csr_aliasing 3.000s 296.199us 1 1 100.00
aes_same_csr_outstanding 1.000s 64.258us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 269.714us 1 1 100.00
aes_csr_rw 1.000s 135.681us 1 1 100.00
aes_csr_aliasing 3.000s 296.199us 1 1 100.00
aes_same_csr_outstanding 1.000s 64.258us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 3.000s 83.161us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 3.000s 293.380us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 3.000s 293.380us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 3.000s 293.380us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 3.000s 293.380us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 199.620us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 2.000s 114.037us 1 1 100.00
aes_sec_cm 4.000s 2363.173us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 114.037us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 5.000s 102.067us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 293.380us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 69.015us 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
aes_alert_reset 5.000s 102.067us 1 1 100.00
aes_core_fi 2.000s 62.402us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 3.000s 293.380us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 65.515us 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 77.620us 1 1 100.00
aes_sideload 3.000s 93.509us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 65.515us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 65.515us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 65.515us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 65.515us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 65.515us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 77.620us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 3.000s 314.625us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
aes_ctr_fi 2.000s 57.345us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 3.000s 314.625us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 3.000s 314.625us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_ctr_fi 2.000s 57.345us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
aes_ctr_fi 2.000s 57.345us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 5.000s 102.067us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
aes_ctr_fi 2.000s 57.345us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
aes_ctr_fi 2.000s 57.345us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_ctr_fi 2.000s 57.345us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 3.000s 314.625us 1 1 100.00
aes_control_fi 2.000s 106.389us 1 1 100.00
aes_cipher_fi 2.000s 117.457us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 17.000s 991.674us 0 1 0.00