Simulation Results: aes

 
02/12/2025 16:09:27 sha: 06584dc json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 90.10 %
  • code
  • 91.94 %
  • assert
  • 97.69 %
  • func
  • 80.68 %
  • block
  • 92.82 %
  • line
  • 94.52 %
  • branch
  • 86.35 %
  • toggle
  • 97.99 %
  • FSM
  • 88.89 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 2.000s 54.428us 1 1 100.00
smoke 1 1 100.00
aes_smoke 2.000s 63.984us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 101.416us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 103.461us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 4.000s 347.080us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 2.000s 163.828us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 2.000s 118.976us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 103.461us 1 1 100.00
aes_csr_aliasing 2.000s 163.828us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 2.000s 63.984us 1 1 100.00
aes_config_error 2.000s 131.149us 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
key_length 3 3 100.00
aes_smoke 2.000s 63.984us 1 1 100.00
aes_config_error 2.000s 131.149us 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
back2back 2 2 100.00
aes_stress 3.000s 78.284us 1 1 100.00
aes_b2b 3.000s 174.562us 1 1 100.00
backpressure 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 2.000s 63.984us 1 1 100.00
aes_config_error 2.000s 131.149us 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
aes_alert_reset 2.000s 136.822us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 2.000s 64.824us 1 1 100.00
aes_config_error 2.000s 131.149us 1 1 100.00
aes_alert_reset 2.000s 136.822us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 4.000s 321.267us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 257.196us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 2.000s 136.822us 1 1 100.00
stress 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
sideload 2 2 100.00
aes_stress 3.000s 78.284us 1 1 100.00
aes_sideload 3.000s 67.931us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 2.000s 56.430us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 17.000s 2740.032us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 1.000s 71.322us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 111.203us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 111.203us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 101.416us 1 1 100.00
aes_csr_rw 2.000s 103.461us 1 1 100.00
aes_csr_aliasing 2.000s 163.828us 1 1 100.00
aes_same_csr_outstanding 2.000s 129.299us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 101.416us 1 1 100.00
aes_csr_rw 2.000s 103.461us 1 1 100.00
aes_csr_aliasing 2.000s 163.828us 1 1 100.00
aes_same_csr_outstanding 2.000s 129.299us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 3.000s 94.059us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 388.597us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 388.597us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 388.597us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 388.597us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 2.000s 161.642us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 2.000s 1154.829us 1 1 100.00
aes_sec_cm 3.000s 880.774us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 2.000s 1154.829us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 2.000s 136.822us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 388.597us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 2.000s 63.984us 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
aes_alert_reset 2.000s 136.822us 1 1 100.00
aes_core_fi 2.000s 211.986us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 388.597us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 1.000s 100.542us 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 3.000s 78.284us 1 1 100.00
aes_sideload 3.000s 67.931us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 1.000s 100.542us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 1.000s 100.542us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 1.000s 100.542us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 1.000s 100.542us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 1.000s 100.542us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 3.000s 78.284us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 2.000s 148.888us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
aes_ctr_fi 2.000s 136.303us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 2.000s 148.888us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 2.000s 148.888us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_ctr_fi 2.000s 136.303us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
aes_ctr_fi 2.000s 136.303us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 2.000s 136.822us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
aes_ctr_fi 2.000s 136.303us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
aes_ctr_fi 2.000s 136.303us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_ctr_fi 2.000s 136.303us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 2.000s 148.888us 1 1 100.00
aes_control_fi 2.000s 59.941us 1 1 100.00
aes_cipher_fi 2.000s 68.830us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 8.000s 1029.593us 0 1 0.00