Simulation Results: keymgr

 
02/12/2025 16:09:27 sha: 06584dc json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.42 %
  • code
  • 95.27 %
  • assert
  • 97.49 %
  • func
  • 63.51 %
  • line
  • 98.74 %
  • branch
  • 97.67 %
  • cond
  • 93.65 %
  • toggle
  • 97.91 %
  • FSM
  • 88.37 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 3.350s 598.379us 1 1 100.00
random 1 1 100.00
keymgr_random 5.550s 568.744us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.260s 42.986us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 1.240s 56.387us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 10.760s 896.392us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 3.270s 373.957us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.740s 168.810us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 1.240s 56.387us 1 1 100.00
keymgr_csr_aliasing 3.270s 373.957us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 1.900s 87.751us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.220s 127.394us 1 1 100.00
keymgr_sideload_kmac 1.670s 43.555us 1 1 100.00
keymgr_sideload_aes 3.410s 593.148us 1 1 100.00
keymgr_sideload_otbn 4.000s 336.072us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 2.400s 75.447us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 5.620s 538.274us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.740s 225.578us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 4.310s 171.916us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 2.300s 30.784us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.720s 56.587us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 83.820s 5909.661us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.960s 13.627us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.920s 165.158us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 2.610s 90.579us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 2.610s 90.579us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.260s 42.986us 1 1 100.00
keymgr_csr_rw 1.240s 56.387us 1 1 100.00
keymgr_csr_aliasing 3.270s 373.957us 1 1 100.00
keymgr_same_csr_outstanding 2.420s 102.275us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.260s 42.986us 1 1 100.00
keymgr_csr_rw 1.240s 56.387us 1 1 100.00
keymgr_csr_aliasing 3.270s 373.957us 1 1 100.00
keymgr_same_csr_outstanding 2.420s 102.275us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 3.630s 894.965us 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 3.800s 466.524us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 3.800s 466.524us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 3.800s 466.524us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 3.800s 466.524us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 3.810s 384.742us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 3.630s 894.965us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 3.800s 466.524us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 1.900s 87.751us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 1.240s 56.387us 1 1 100.00
keymgr_random 5.550s 568.744us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 1.240s 56.387us 1 1 100.00
keymgr_random 5.550s 568.744us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 1.240s 56.387us 1 1 100.00
keymgr_random 5.550s 568.744us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 5.620s 538.274us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.300s 30.784us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 2.300s 30.784us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 5.550s 568.744us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.130s 76.667us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 4.050s 345.819us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 5.620s 538.274us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.050s 345.819us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.050s 345.819us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 4.050s 345.819us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 5.740s 2771.385us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 4.050s 345.819us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 13.100s 557.227us 1 1 100.00