Simulation Results: i2c

 
03/12/2025 16:08:58 sha: a5eb48e json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 85.85 %
  • code
  • 81.65 %
  • assert
  • 96.19 %
  • func
  • 79.70 %
  • line
  • 96.45 %
  • branch
  • 92.41 %
  • cond
  • 85.49 %
  • toggle
  • 89.24 %
  • FSM
  • 44.64 %
Validation stages
V1
100.00%
V2
93.88%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
host_smoke 1 1 100.00
i2c_host_smoke 68.170s 4525.480us 1 1 100.00
target_smoke 1 1 100.00
i2c_target_smoke 14.040s 5290.676us 1 1 100.00
csr_hw_reset 1 1 100.00
i2c_csr_hw_reset 0.830s 60.984us 1 1 100.00
csr_rw 1 1 100.00
i2c_csr_rw 0.770s 35.245us 1 1 100.00
csr_bit_bash 1 1 100.00
i2c_csr_bit_bash 2.100s 249.563us 1 1 100.00
csr_aliasing 1 1 100.00
i2c_csr_aliasing 0.980s 25.716us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
i2c_csr_mem_rw_with_rand_reset 0.970s 23.097us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
i2c_csr_rw 0.770s 35.245us 1 1 100.00
i2c_csr_aliasing 0.980s 25.716us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_error_intr 0 1 0.00
i2c_host_error_intr 0.860s 4.253us 0 1 0.00
host_stress_all 0 1 0.00
i2c_host_stress_all 113.080s 20516.506us 0 1 0.00
host_maxperf 1 1 100.00
i2c_host_perf 62.120s 29783.445us 1 1 100.00
host_override 1 1 100.00
i2c_host_override 0.730s 46.790us 1 1 100.00
host_fifo_watermark 1 1 100.00
i2c_host_fifo_watermark 96.190s 20315.769us 1 1 100.00
host_fifo_overflow 1 1 100.00
i2c_host_fifo_overflow 54.460s 10695.594us 1 1 100.00
host_fifo_reset 3 3 100.00
i2c_host_fifo_reset_fmt 0.890s 374.733us 1 1 100.00
i2c_host_fifo_fmt_empty 8.900s 507.390us 1 1 100.00
i2c_host_fifo_reset_rx 3.360s 208.606us 1 1 100.00
host_fifo_full 1 1 100.00
i2c_host_fifo_full 53.660s 10746.426us 1 1 100.00
host_timeout 1 1 100.00
i2c_host_stretch_timeout 6.890s 613.134us 1 1 100.00
i2c_host_mode_toggle 1 1 100.00
i2c_host_mode_toggle 1.310s 308.919us 1 1 100.00
target_glitch 0 1 0.00
i2c_target_glitch 1.920s 444.398us 0 1 0.00
target_stress_all 1 1 100.00
i2c_target_stress_all 111.650s 40212.788us 1 1 100.00
target_maxperf 1 1 100.00
i2c_target_perf 3.390s 2200.462us 1 1 100.00
target_fifo_empty 2 2 100.00
i2c_target_stress_rd 38.470s 5203.998us 1 1 100.00
i2c_target_intr_smoke 4.140s 987.370us 1 1 100.00
target_fifo_reset 2 2 100.00
i2c_target_fifo_reset_acq 1.100s 177.140us 1 1 100.00
i2c_target_fifo_reset_tx 1.290s 315.292us 1 1 100.00
target_fifo_full 3 3 100.00
i2c_target_stress_wr 5.440s 13572.509us 1 1 100.00
i2c_target_stress_rd 38.470s 5203.998us 1 1 100.00
i2c_target_intr_stress_wr 22.100s 14819.626us 1 1 100.00
target_timeout 1 1 100.00
i2c_target_timeout 4.230s 1144.349us 1 1 100.00
target_clock_stretch 1 1 100.00
i2c_target_stretch 36.930s 1386.310us 1 1 100.00
bad_address 1 1 100.00
i2c_target_bad_addr 3.960s 16644.832us 1 1 100.00
target_mode_glitch 1 1 100.00
i2c_target_hrst 1.800s 661.533us 1 1 100.00
target_fifo_watermark 2 2 100.00
i2c_target_fifo_watermarks_acq 1.940s 1039.630us 1 1 100.00
i2c_target_fifo_watermarks_tx 1.200s 565.697us 1 1 100.00
host_mode_config_perf 2 2 100.00
i2c_host_perf 62.120s 29783.445us 1 1 100.00
i2c_host_perf_precise 2.960s 1177.214us 1 1 100.00
host_mode_clock_stretching 1 1 100.00
i2c_host_stretch_timeout 6.890s 613.134us 1 1 100.00
target_mode_tx_stretch_ctrl 1 1 100.00
i2c_target_tx_stretch_ctrl 1.060s 51.703us 1 1 100.00
target_mode_nack_generation 3 3 100.00
i2c_target_nack_acqfull 2.030s 1994.733us 1 1 100.00
i2c_target_nack_acqfull_addr 1.990s 545.910us 1 1 100.00
i2c_target_nack_txstretch 1.280s 340.510us 1 1 100.00
host_mode_halt_on_nak 1 1 100.00
i2c_host_may_nack 4.940s 600.595us 1 1 100.00
target_mode_smbus_maxlen 1 1 100.00
i2c_target_smbus_maxlen 1.820s 514.768us 1 1 100.00
alert_test 1 1 100.00
i2c_alert_test 0.640s 38.093us 1 1 100.00
intr_test 1 1 100.00
i2c_intr_test 0.950s 19.548us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
i2c_tl_errors 1.770s 701.835us 1 1 100.00
tl_d_illegal_access 1 1 100.00
i2c_tl_errors 1.770s 701.835us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
i2c_csr_hw_reset 0.830s 60.984us 1 1 100.00
i2c_csr_rw 0.770s 35.245us 1 1 100.00
i2c_csr_aliasing 0.980s 25.716us 1 1 100.00
i2c_same_csr_outstanding 0.760s 154.274us 1 1 100.00
tl_d_partial_access 4 4 100.00
i2c_csr_hw_reset 0.830s 60.984us 1 1 100.00
i2c_csr_rw 0.770s 35.245us 1 1 100.00
i2c_csr_aliasing 0.980s 25.716us 1 1 100.00
i2c_same_csr_outstanding 0.760s 154.274us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
i2c_tl_intg_err 1.880s 324.568us 1 1 100.00
i2c_sec_cm 0.950s 270.844us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
i2c_tl_intg_err 1.880s 324.568us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
host_stress_all_with_rand_reset 0 1 0.00
i2c_host_stress_all_with_rand_reset 13.040s 865.366us 0 1 0.00
target_error_intr 0 1 0.00
i2c_target_unexp_stop 0.890s 134.798us 0 1 0.00
target_stress_all_with_rand_reset 0 1 0.00
i2c_target_stress_all_with_rand_reset 1.430s 16.310us 0 1 0.00