clkmgr Simulation Results

Simulation Results: clkmgr

09/12/2025 16:01:56 sha: 42dbfeb json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
73.58 %

code
69.67 %

assert
90.08 %

func
60.98 %

line
82.39 %

branch
87.58 %

cond
79.12 %

toggle
99.25 %

FSM
0.00 %

Validation stages

V1		25.00%
V2		47.37%
V2S		52.94%
V3		0.00%

2/8 passed

25.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	clkmgr_smoke	1.070s	51.936us	1	1	100.00
csr_hw_reset				1	1	100.00
	clkmgr_csr_hw_reset	1.410s	104.401us	1	1	100.00
csr_rw				0	1	0.00
	clkmgr_csr_rw	0.700s	3.636us	0	1	0.00
csr_bit_bash				0	1	0.00
	clkmgr_csr_bit_bash	0.950s	21.343us	0	1	0.00
csr_aliasing				0	1	0.00
	clkmgr_csr_aliasing	0.900s	38.687us	0	1	0.00
csr_mem_rw_with_rand_reset				0	1	0.00
	clkmgr_csr_mem_rw_with_rand_reset	4.230s	361.798us	0	1	0.00
regwen_csr_and_corresponding_lockable_csr				0	2	0.00
	clkmgr_csr_rw	0.700s	3.636us	0	1	0.00
	clkmgr_csr_aliasing	0.900s	38.687us	0	1	0.00

9/19 passed

47.37 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
peri_enables				1	1	100.00
	clkmgr_peri	0.750s	16.431us	1	1	100.00
trans_enables				1	1	100.00
	clkmgr_trans	0.670s	13.074us	1	1	100.00
clk_status				1	1	100.00
	clkmgr_clk_status	0.880s	13.239us	1	1	100.00
jitter				1	1	100.00
	clkmgr_smoke	1.070s	51.936us	1	1	100.00
frequency				0	1	0.00
	clkmgr_frequency	0.940s	22.611us	0	1	0.00
frequency_timeout				0	1	0.00
	clkmgr_frequency_timeout	0.860s	7.265us	0	1	0.00
frequency_overflow				0	1	0.00
	clkmgr_frequency	0.940s	22.611us	0	1	0.00
stress_all				0	1	0.00
	clkmgr_stress_all	1.080s	19.901us	0	1	0.00
alert_test				1	1	100.00
	clkmgr_alert_test	0.860s	20.921us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	clkmgr_tl_errors	3.110s	142.095us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	clkmgr_tl_errors	3.110s	142.095us	1	1	100.00
tl_d_outstanding_access				1	4	25.00
	clkmgr_csr_hw_reset	1.410s	104.401us	1	1	100.00
	clkmgr_csr_rw	0.700s	3.636us	0	1	0.00
	clkmgr_csr_aliasing	0.900s	38.687us	0	1	0.00
	clkmgr_same_csr_outstanding	0.660s	5.359us	0	1	0.00
tl_d_partial_access				1	4	25.00
	clkmgr_csr_hw_reset	1.410s	104.401us	1	1	100.00
	clkmgr_csr_rw	0.700s	3.636us	0	1	0.00
	clkmgr_csr_aliasing	0.900s	38.687us	0	1	0.00
	clkmgr_same_csr_outstanding	0.660s	5.359us	0	1	0.00

V2S

9/17 passed

52.94 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				1	2	50.00
	clkmgr_sec_cm	5.140s	524.873us	1	1	100.00
	clkmgr_tl_intg_err	0.690s	6.206us	0	1	0.00
shadow_reg_update_error				1	1	100.00
	clkmgr_shadow_reg_errors	1.850s	139.093us	1	1	100.00
shadow_reg_read_clear_staged_value				1	1	100.00
	clkmgr_shadow_reg_errors	1.850s	139.093us	1	1	100.00
shadow_reg_storage_error				1	1	100.00
	clkmgr_shadow_reg_errors	1.850s	139.093us	1	1	100.00
shadowed_reset_glitch				1	1	100.00
	clkmgr_shadow_reg_errors	1.850s	139.093us	1	1	100.00
shadow_reg_update_error_with_csr_rw				0	1	0.00
	clkmgr_shadow_reg_errors_with_csr_rw	0.770s	11.986us	0	1	0.00
sec_cm_bus_integrity				0	1	0.00
	clkmgr_tl_intg_err	0.690s	6.206us	0	1	0.00
sec_cm_meas_clk_bkgn_chk				0	1	0.00
	clkmgr_frequency	0.940s	22.611us	0	1	0.00
sec_cm_timeout_clk_bkgn_chk				0	1	0.00
	clkmgr_frequency_timeout	0.860s	7.265us	0	1	0.00
sec_cm_meas_config_shadow				1	1	100.00
	clkmgr_shadow_reg_errors	1.850s	139.093us	1	1	100.00
sec_cm_idle_intersig_mubi				1	1	100.00
	clkmgr_idle_intersig_mubi	1.410s	86.743us	1	1	100.00
sec_cm_jitter_config_mubi				0	1	0.00
	clkmgr_csr_rw	0.700s	3.636us	0	1	0.00
sec_cm_idle_ctr_redun				1	1	100.00
	clkmgr_sec_cm	5.140s	524.873us	1	1	100.00
sec_cm_meas_config_regwen				0	1	0.00
	clkmgr_csr_rw	0.700s	3.636us	0	1	0.00
sec_cm_clk_ctrl_config_regwen				0	1	0.00
	clkmgr_csr_rw	0.700s	3.636us	0	1	0.00
prim_count_check				1	1	100.00
	clkmgr_sec_cm	5.140s	524.873us	1	1	100.00

0/2 passed

0.00 %

Testpoint	Test	Max Runtime	Sim Time	Total
regwen				1
	clkmgr_regwen	0.770s	10.062us	1
stress_all_with_rand_reset				1
	clkmgr_stress_all_with_rand_reset	1.850s	38.285us	1

Error Messages

	Test	seed	line	log context
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected b, got b
	clkmgr_frequency	85335235980770392079848789502397326340918758893900092305225405850704884182062	72	UVM_ERROR @ 22611068 ps: (clkmgr_base_vseq.sv:320) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected 0b10, got 0b00 UVM_INFO @ 22611068 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	clkmgr_stress_all_with_rand_reset	41683244867905926176835099067183682301932877805344676789267223807893394839666	172	UVM_ERROR @ 38285158 ps: (clkmgr_base_vseq.sv:320) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected 0b01, got 0b00 UVM_INFO @ 38285158 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	clkmgr_stress_all	82472022693245779423323898008071896725812852106376296110919763154525208600372	75	UVM_ERROR @ 19900517 ps: (clkmgr_base_vseq.sv:320) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_frequency_vseq] Mismatch for measurement recoverable error, expected 0b10, got 0b00 UVM_INFO @ 19900517 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_base_vseq.sv:320) virtual_sequencer [clkmgr_frequency_timeout_vseq] Mismatch for timeout recoverable error, expected b, got b
	clkmgr_frequency_timeout	48305018016627196972925618151449132560586729825395732491575935888517078900686	75	UVM_ERROR @ 7264798 ps: (clkmgr_base_vseq.sv:320) uvm_test_top.env.virtual_sequencer [uvm_test_top.env.virtual_sequencer.clkmgr_frequency_timeout_vseq] Mismatch for timeout recoverable error, expected 0b01, got 0b00 UVM_INFO @ 7264798 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (clkmgr_scoreboard.sv:257) [scoreboard] Check failed csr.get_mirrored_value() == item.d_data (* [] vs [*]) reg name: clkmgr_reg_block.io_meas_ctrl_shadowed
	clkmgr_regwen	40269095618647783696997624394411687285447794846008630748400295392945125038619	71	UVM_ERROR @ 10061971 ps: (clkmgr_scoreboard.sv:257) [uvm_test_top.env.scoreboard] Check failed csr.get_mirrored_value() == item.d_data (60554 [0xec8a] vs 64129 [0xfa81]) reg name: clkmgr_reg_block.io_meas_ctrl_shadowed UVM_INFO @ 10061971 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value:
	clkmgr_shadow_reg_errors_with_csr_rw	95674730390285308414254341936241529614379489376011442436204542963288325198444	72	UVM_ERROR @ 11985569 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: 0x1 UVM_INFO @ 11985569 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	clkmgr_tl_intg_err	71491140942118286505545366080996836454674559569392826632205024230713087354933	79	UVM_ERROR @ 6205610 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: 0x1 UVM_INFO @ 6205610 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	clkmgr_csr_rw	103034154060669145926477177698785166974864267847608753339526546138194990255074	72	UVM_ERROR @ 3636088 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: 0x1 UVM_INFO @ 3636088 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
	clkmgr_csr_mem_rw_with_rand_reset	53290055791125978768795956020456172696304367348150945680981430844248466352114	79	UVM_ERROR @ 361798356 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: clkmgr_reg_block.measure_ctrl_regwen.en reset value: 0x1 UVM_INFO @ 361798356 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: Wrote clkmgr_reg_block.measure_ctrl_regwen[]:
	clkmgr_csr_bit_bash	45698427008254592676300633441656566863303438749320651137145027075768478239942	72	UVM_ERROR @ 21342625 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: 0x1 Wrote clkmgr_reg_block.measure_ctrl_regwen[0]: 0 UVM_INFO @ 21342625 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_] Check failed obs == exp ( [] vs []) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value:
	clkmgr_csr_aliasing	16480319351668984668955948652352743882274097922336210356738627872652161043249	72	UVM_ERROR @ 38687182 ps: (csr_utils_pkg.sv:456) [csr_utils_pkg::csr_rd_check.isolation_fork.unnamed$$_0] Check failed obs == exp (1 [0x1] vs 0 [0x0]) Regname: clkmgr_reg_block.measure_ctrl_regwen reset value: 0x1 UVM_INFO @ 38687182 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---
UVM_ERROR (cip_base_vseq.sv:642) [clkmgr_common_vseq] Check failed masked_data == exp_data (* [] vs []) addr read out mismatch
	clkmgr_same_csr_outstanding	82043597254713505424146679921994533280303693190539081214432577966235430805914	72	UVM_ERROR @ 5359252 ps: (cip_base_vseq.sv:642) [uvm_test_top.env.virtual_sequencer.clkmgr_common_vseq] Check failed masked_data == exp_data (1 [0x1] vs 0 [0x0]) addr 0x8aaa27e4 read out mismatch UVM_INFO @ 5359252 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER] --- UVM Report catcher Summary ---