Simulation Results: keymgr

 
09/12/2025 16:01:56 sha: 42dbfeb json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 88.25 %
  • code
  • 96.19 %
  • assert
  • 97.72 %
  • func
  • 70.83 %
  • line
  • 98.82 %
  • branch
  • 97.94 %
  • cond
  • 93.37 %
  • toggle
  • 97.81 %
  • FSM
  • 93.02 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
keymgr_smoke 2.250s 38.354us 1 1 100.00
random 1 1 100.00
keymgr_random 6.020s 1374.955us 1 1 100.00
csr_hw_reset 1 1 100.00
keymgr_csr_hw_reset 1.240s 13.762us 1 1 100.00
csr_rw 1 1 100.00
keymgr_csr_rw 0.830s 58.860us 1 1 100.00
csr_bit_bash 1 1 100.00
keymgr_csr_bit_bash 5.530s 138.084us 1 1 100.00
csr_aliasing 1 1 100.00
keymgr_csr_aliasing 5.150s 186.869us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
keymgr_csr_mem_rw_with_rand_reset 1.820s 29.005us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
keymgr_csr_rw 0.830s 58.860us 1 1 100.00
keymgr_csr_aliasing 5.150s 186.869us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
cfgen_during_op 1 1 100.00
keymgr_cfg_regwen 6.790s 421.806us 1 1 100.00
sideload 4 4 100.00
keymgr_sideload 2.120s 33.909us 1 1 100.00
keymgr_sideload_kmac 4.910s 243.310us 1 1 100.00
keymgr_sideload_aes 20.400s 3016.234us 1 1 100.00
keymgr_sideload_otbn 6.150s 372.824us 1 1 100.00
direct_to_disabled_state 1 1 100.00
keymgr_direct_to_disabled 3.200s 170.367us 1 1 100.00
lc_disable 1 1 100.00
keymgr_lc_disable 3.250s 79.679us 1 1 100.00
kmac_error_response 1 1 100.00
keymgr_kmac_rsp_err 2.950s 277.399us 1 1 100.00
invalid_sw_input 1 1 100.00
keymgr_sw_invalid_input 3.930s 171.013us 1 1 100.00
invalid_hw_input 1 1 100.00
keymgr_hwsw_invalid_input 1.970s 64.775us 1 1 100.00
sync_async_fault_cross 1 1 100.00
keymgr_sync_async_fault_cross 1.960s 377.570us 1 1 100.00
stress_all 1 1 100.00
keymgr_stress_all 16.520s 469.664us 1 1 100.00
intr_test 1 1 100.00
keymgr_intr_test 0.710s 36.804us 1 1 100.00
alert_test 1 1 100.00
keymgr_alert_test 0.900s 35.053us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
keymgr_tl_errors 1.810s 26.281us 1 1 100.00
tl_d_illegal_access 1 1 100.00
keymgr_tl_errors 1.810s 26.281us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
keymgr_csr_hw_reset 1.240s 13.762us 1 1 100.00
keymgr_csr_rw 0.830s 58.860us 1 1 100.00
keymgr_csr_aliasing 5.150s 186.869us 1 1 100.00
keymgr_same_csr_outstanding 1.490s 54.748us 1 1 100.00
tl_d_partial_access 4 4 100.00
keymgr_csr_hw_reset 1.240s 13.762us 1 1 100.00
keymgr_csr_rw 0.830s 58.860us 1 1 100.00
keymgr_csr_aliasing 5.150s 186.869us 1 1 100.00
keymgr_same_csr_outstanding 1.490s 54.748us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
sec_cm_additional_check 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
tl_intg_err 2 2 100.00
keymgr_tl_intg_err 6.620s 833.866us 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
shadow_reg_update_error 1 1 100.00
keymgr_shadow_reg_errors 2.590s 320.945us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
keymgr_shadow_reg_errors 2.590s 320.945us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
keymgr_shadow_reg_errors 2.590s 320.945us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
keymgr_shadow_reg_errors 2.590s 320.945us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
keymgr_shadow_reg_errors_with_csr_rw 10.910s 1609.970us 1 1 100.00
prim_count_check 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
prim_fsm_check 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
keymgr_tl_intg_err 6.620s 833.866us 1 1 100.00
sec_cm_config_shadow 1 1 100.00
keymgr_shadow_reg_errors 2.590s 320.945us 1 1 100.00
sec_cm_op_config_regwen 1 1 100.00
keymgr_cfg_regwen 6.790s 421.806us 1 1 100.00
sec_cm_reseed_config_regwen 2 2 100.00
keymgr_csr_rw 0.830s 58.860us 1 1 100.00
keymgr_random 6.020s 1374.955us 1 1 100.00
sec_cm_sw_binding_config_regwen 2 2 100.00
keymgr_csr_rw 0.830s 58.860us 1 1 100.00
keymgr_random 6.020s 1374.955us 1 1 100.00
sec_cm_max_key_ver_config_regwen 2 2 100.00
keymgr_csr_rw 0.830s 58.860us 1 1 100.00
keymgr_random 6.020s 1374.955us 1 1 100.00
sec_cm_lc_ctrl_intersig_mubi 1 1 100.00
keymgr_lc_disable 3.250s 79.679us 1 1 100.00
sec_cm_constants_consistency 1 1 100.00
keymgr_hwsw_invalid_input 1.970s 64.775us 1 1 100.00
sec_cm_intersig_consistency 1 1 100.00
keymgr_hwsw_invalid_input 1.970s 64.775us 1 1 100.00
sec_cm_hw_key_sw_noaccess 1 1 100.00
keymgr_random 6.020s 1374.955us 1 1 100.00
sec_cm_output_keys_ctrl_redun 1 1 100.00
keymgr_sideload_protect 2.970s 99.721us 1 1 100.00
sec_cm_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_data_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_ctrl_fsm_local_esc 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_ctrl_fsm_consistency 1 1 100.00
keymgr_custom_cm 3.300s 106.367us 1 1 100.00
sec_cm_ctrl_fsm_global_esc 1 1 100.00
keymgr_lc_disable 3.250s 79.679us 1 1 100.00
sec_cm_ctrl_ctr_redun 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_kmac_if_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_kmac_if_ctr_redun 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_kmac_if_cmd_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.300s 106.367us 1 1 100.00
sec_cm_kmac_if_done_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.300s 106.367us 1 1 100.00
sec_cm_reseed_ctr_redun 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_side_load_sel_ctrl_consistency 1 1 100.00
keymgr_custom_cm 3.300s 106.367us 1 1 100.00
sec_cm_sideload_ctrl_fsm_sparse 1 1 100.00
keymgr_sec_cm 7.760s 1119.598us 1 1 100.00
sec_cm_ctrl_key_integrity 1 1 100.00
keymgr_custom_cm 3.300s 106.367us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
keymgr_stress_all_with_rand_reset 13.920s 1131.343us 1 1 100.00

Error Messages

   Test seed line log context