Simulation Results: mbx

 
09/12/2025 16:01:56 sha: 42dbfeb json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 91.24 %
  • code
  • 91.55 %
  • assert
  • 96.81 %
  • func
  • 85.35 %
  • block
  • 96.68 %
  • line
  • 96.64 %
  • branch
  • 91.89 %
  • toggle
  • 86.12 %
Validation stages
V1
100.00%
V2
87.50%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 49.000s 2044.640us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 1.000s 57.595us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 43.618us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 2.000s 40.863us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 1.000s 56.274us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
mbx_csr_mem_rw_with_rand_reset 2.000s 23.083us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 43.618us 1 1 100.00
mbx_csr_aliasing 1.000s 56.274us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 0 1 0.00
mbx_stress 10.000s 878.498us 0 1 0.00
mbx_max_activity 0 1 0.00
mbx_stress_zero_delays 4.000s 108.357us 0 1 0.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 47.000s 11261.854us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 9.000s 1427.682us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 18.214us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 2.000s 17.498us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
mbx_tl_errors 2.000s 98.078us 1 1 100.00
tl_d_illegal_access 1 1 100.00
mbx_tl_errors 2.000s 98.078us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 1.000s 57.595us 1 1 100.00
mbx_csr_rw 1.000s 43.618us 1 1 100.00
mbx_csr_aliasing 1.000s 56.274us 1 1 100.00
mbx_same_csr_outstanding 1.000s 16.255us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 1.000s 57.595us 1 1 100.00
mbx_csr_rw 1.000s 43.618us 1 1 100.00
mbx_csr_aliasing 1.000s 56.274us 1 1 100.00
mbx_same_csr_outstanding 1.000s 16.255us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_sec_cm 1.000s 12.438us 1 1 100.00
mbx_tl_intg_err 3.000s 604.046us 1 1 100.00

Error Messages

   Test seed line log context
UVM_ERROR (mbx_scoreboard.sv:537) [scoreboard] Check failed m_ib_data_q.size() != * (* [*] vs * [*]) No write data in WDATA register
mbx_stress 51521174564110398147976866020187097891230667664732836599808527497059965649196 524
UVM_ERROR @ 878498025 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
UVM_INFO @ 878498025 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---
mbx_stress_zero_delays 83744915737632789822385114140869877394745955167776522003642382160557337918799 86
UVM_ERROR @ 108357177 ps: (mbx_scoreboard.sv:537) [uvm_test_top.env.scoreboard] Check failed m_ib_data_q.size() != 0 (0 [0x0] vs 0 [0x0]) No write data in WDATA register
UVM_INFO @ 108357177 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---