spi_device Simulation Results

Simulation Results: spi_device

09/12/2025 16:01:56 sha: 42dbfeb json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
86.63 %

code
93.06 %

assert
94.30 %

func
72.52 %

line
99.07 %

branch
98.30 %

cond
95.22 %

toggle
83.36 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	26.010s	3183.640us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	1.040s	119.612us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.860s	284.334us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	8.250s	196.617us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	9.740s	418.834us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	1.640s	111.408us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.860s	284.334us	1	1	100.00
	spi_device_csr_aliasing	9.740s	418.834us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.650s	21.081us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.400s	43.111us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	1.070s	47.416us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.840s	7.340us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.760s	7.004us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	0.920s	290.303us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	0.920s	290.303us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	3.820s	3247.491us	1	1	100.00
	spi_device_tpm_sts_read	0.830s	73.626us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	0.800s	39.312us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	2.250s	2827.977us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	12.870s	12677.875us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	12.870s	12677.875us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	3.700s	338.054us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	3.700s	338.054us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	3.700s	338.054us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	3.700s	338.054us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	3.700s	338.054us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	2.440s	718.414us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	3.900s	233.228us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	3.900s	233.228us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	3.900s	233.228us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	1.910s	592.419us	1	1	100.00
	spi_device_read_buffer_direct	3.140s	786.497us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	3.900s	233.228us	1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	32.960s	26022.383us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	2.000s	255.837us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	2.000s	255.837us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	26.010s	3183.640us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	34.280s	2654.583us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	297.400s	86726.808us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.870s	16.303us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	0.820s	46.351us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	3.690s	212.256us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	3.690s	212.256us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	1.040s	119.612us	1	1	100.00
	spi_device_csr_rw	1.860s	284.334us	1	1	100.00
	spi_device_csr_aliasing	9.740s	418.834us	1	1	100.00
	spi_device_same_csr_outstanding	2.140s	544.163us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	1.040s	119.612us	1	1	100.00
	spi_device_csr_rw	1.860s	284.334us	1	1	100.00
	spi_device_csr_aliasing	9.740s	418.834us	1	1	100.00
	spi_device_same_csr_outstanding	2.140s	544.163us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	9.380s	2209.376us	1	1	100.00
	spi_device_sec_cm	0.950s	41.493us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	9.380s	2209.376us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	43.870s	10328.888us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	45417115554834825869480885172295142172521004075430309380125365418625214265027	73	UVM_ERROR @ 4619933 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[5]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 4619933 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 4619933 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[901]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	114496242690551959713046389564266061921191914759517816022266776330159653447602	73	UVM_ERROR @ 4359533 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x5c6106 [10111000110000100000110] vs 0x0 [0]) UVM_ERROR @ 4439533 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x45ba3e [10001011011101000111110] vs 0x0 [0]) UVM_ERROR @ 4519533 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x1819b9 [110000001100110111001] vs 0x0 [0]) UVM_ERROR @ 4526533 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x8ca693 [100011001010011010010011] vs 0x0 [0]) UVM_ERROR @ 4611533 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x4efd60 [10011101111110101100000] vs 0x0 [0])