Simulation Results: kmac

 
10/12/2025 16:08:41 sha: 141563d json Branch: master Tool: vcs [unknown]
Coverage statistics
  • Total
  • 94.33 %
  • code
  • 91.19 %
  • assert
  • 97.52 %
  • func
  • 94.29 %
  • line
  • 99.05 %
  • branch
  • 96.89 %
  • cond
  • 93.66 %
  • toggle
  • 99.46 %
  • FSM
  • 66.90 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
smoke 1 1 100.00
kmac_smoke 14.030s 679.568us 1 1 100.00
csr_hw_reset 1 1 100.00
kmac_csr_hw_reset 0.960s 24.881us 1 1 100.00
csr_rw 1 1 100.00
kmac_csr_rw 0.960s 113.981us 1 1 100.00
csr_bit_bash 1 1 100.00
kmac_csr_bit_bash 5.790s 263.669us 1 1 100.00
csr_aliasing 1 1 100.00
kmac_csr_aliasing 5.340s 147.281us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
kmac_csr_mem_rw_with_rand_reset 1.770s 129.632us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
kmac_csr_rw 0.960s 113.981us 1 1 100.00
kmac_csr_aliasing 5.340s 147.281us 1 1 100.00
mem_walk 1 1 100.00
kmac_mem_walk 0.690s 39.500us 1 1 100.00
mem_partial_access 1 1 100.00
kmac_mem_partial_access 1.290s 53.187us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
long_msg_and_output 1 1 100.00
kmac_long_msg_and_output 500.470s 6620.050us 1 1 100.00
burst_write 1 1 100.00
kmac_burst_write 143.070s 7028.046us 1 1 100.00
test_vectors 8 8 100.00
kmac_test_vectors_sha3_224 1767.710s 80376.665us 1 1 100.00
kmac_test_vectors_sha3_256 31.020s 6200.756us 1 1 100.00
kmac_test_vectors_sha3_384 19.510s 3107.151us 1 1 100.00
kmac_test_vectors_sha3_512 1037.850s 165365.145us 1 1 100.00
kmac_test_vectors_shake_128 239.610s 55897.314us 1 1 100.00
kmac_test_vectors_shake_256 282.750s 50620.515us 1 1 100.00
kmac_test_vectors_kmac 2.400s 109.034us 1 1 100.00
kmac_test_vectors_kmac_xof 2.910s 94.329us 1 1 100.00
sideload 1 1 100.00
kmac_sideload 44.500s 814.775us 1 1 100.00
app 1 1 100.00
kmac_app 183.050s 10936.880us 1 1 100.00
app_with_partial_data 1 1 100.00
kmac_app_with_partial_data 136.240s 10739.069us 1 1 100.00
entropy_refresh 1 1 100.00
kmac_entropy_refresh 45.210s 3478.044us 1 1 100.00
error 1 1 100.00
kmac_error 106.020s 7771.881us 1 1 100.00
key_error 1 1 100.00
kmac_key_error 2.520s 4952.246us 1 1 100.00
sideload_invalid 1 1 100.00
kmac_sideload_invalid 5.900s 309.534us 1 1 100.00
edn_timeout_error 1 1 100.00
kmac_edn_timeout_error 1.130s 20.373us 1 1 100.00
entropy_mode_error 1 1 100.00
kmac_entropy_mode_error 1.140s 22.386us 1 1 100.00
entropy_ready_error 1 1 100.00
kmac_entropy_ready_error 38.050s 4509.270us 1 1 100.00
lc_escalation 1 1 100.00
kmac_lc_escalation 1.560s 27.741us 1 1 100.00
stress_all 1 1 100.00
kmac_stress_all 1460.100s 32506.852us 1 1 100.00
intr_test 1 1 100.00
kmac_intr_test 0.700s 45.241us 1 1 100.00
alert_test 1 1 100.00
kmac_alert_test 1.070s 84.170us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
kmac_tl_errors 2.050s 40.239us 1 1 100.00
tl_d_illegal_access 1 1 100.00
kmac_tl_errors 2.050s 40.239us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
kmac_csr_hw_reset 0.960s 24.881us 1 1 100.00
kmac_csr_rw 0.960s 113.981us 1 1 100.00
kmac_csr_aliasing 5.340s 147.281us 1 1 100.00
kmac_same_csr_outstanding 1.750s 443.222us 1 1 100.00
tl_d_partial_access 4 4 100.00
kmac_csr_hw_reset 0.960s 24.881us 1 1 100.00
kmac_csr_rw 0.960s 113.981us 1 1 100.00
kmac_csr_aliasing 5.340s 147.281us 1 1 100.00
kmac_same_csr_outstanding 1.750s 443.222us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
shadow_reg_update_error 1 1 100.00
kmac_shadow_reg_errors 1.930s 226.702us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
kmac_shadow_reg_errors 1.930s 226.702us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
kmac_shadow_reg_errors 1.930s 226.702us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
kmac_shadow_reg_errors 1.930s 226.702us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
kmac_shadow_reg_errors_with_csr_rw 2.090s 78.949us 1 1 100.00
tl_intg_err 2 2 100.00
kmac_tl_intg_err 2.580s 434.860us 1 1 100.00
kmac_sec_cm 28.390s 13247.636us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
kmac_tl_intg_err 2.580s 434.860us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
kmac_lc_escalation 1.560s 27.741us 1 1 100.00
sec_cm_sw_key_key_masking 1 1 100.00
kmac_smoke 14.030s 679.568us 1 1 100.00
sec_cm_key_sideload 1 1 100.00
kmac_sideload 44.500s 814.775us 1 1 100.00
sec_cm_cfg_shadowed_config_shadow 1 1 100.00
kmac_shadow_reg_errors 1.930s 226.702us 1 1 100.00
sec_cm_fsm_sparse 1 1 100.00
kmac_sec_cm 28.390s 13247.636us 1 1 100.00
sec_cm_ctr_redun 1 1 100.00
kmac_sec_cm 28.390s 13247.636us 1 1 100.00
sec_cm_packer_ctr_redun 1 1 100.00
kmac_sec_cm 28.390s 13247.636us 1 1 100.00
sec_cm_cfg_shadowed_config_regwen 1 1 100.00
kmac_smoke 14.030s 679.568us 1 1 100.00
sec_cm_fsm_global_esc 1 1 100.00
kmac_lc_escalation 1.560s 27.741us 1 1 100.00
sec_cm_fsm_local_esc 1 1 100.00
kmac_sec_cm 28.390s 13247.636us 1 1 100.00
sec_cm_absorbed_ctrl_mubi 1 1 100.00
kmac_mubi 205.790s 39388.100us 1 1 100.00
sec_cm_sw_cmd_ctrl_sparse 1 1 100.00
kmac_smoke 14.030s 679.568us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 1 1 100.00
kmac_stress_all_with_rand_reset 120.590s 3261.927us 1 1 100.00

Error Messages

   Test seed line log context