spi_device Simulation Results

Simulation Results: spi_device

10/12/2025 16:08:41 sha: 141563d json Branch: master Tool: vcs [unknown]

Coverage statistics

Total
84.62 %

code
93.15 %

assert
94.30 %

func
66.42 %

line
99.05 %

branch
98.21 %

cond
95.60 %

toggle
83.54 %

FSM
89.36 %

Validation stages

V1		100.00%
V2		96.15%
V2S		100.00%
unmapped		100.00%

10/10 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
smoke				1	1	100.00
	spi_device_flash_and_tpm	22.660s	2741.173us	1	1	100.00
csr_hw_reset				1	1	100.00
	spi_device_csr_hw_reset	0.880s	76.887us	1	1	100.00
csr_rw				1	1	100.00
	spi_device_csr_rw	1.620s	158.366us	1	1	100.00
csr_bit_bash				1	1	100.00
	spi_device_csr_bit_bash	22.870s	1856.839us	1	1	100.00
csr_aliasing				1	1	100.00
	spi_device_csr_aliasing	10.630s	2840.314us	1	1	100.00
csr_mem_rw_with_rand_reset				1	1	100.00
	spi_device_csr_mem_rw_with_rand_reset	2.970s	314.171us	1	1	100.00
regwen_csr_and_corresponding_lockable_csr				2	2	100.00
	spi_device_csr_rw	1.620s	158.366us	1	1	100.00
	spi_device_csr_aliasing	10.630s	2840.314us	1	1	100.00
mem_walk				1	1	100.00
	spi_device_mem_walk	0.780s	12.577us	1	1	100.00
mem_partial_access				1	1	100.00
	spi_device_mem_partial_access	1.230s	250.173us	1	1	100.00

50/52 passed

96.15 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
csb_read				1	1	100.00
	spi_device_csb_read	0.790s	32.478us	1	1	100.00
mem_parity				0	1	0.00
	spi_device_mem_parity	0.640s	10.834us	0	1	0.00
mem_cfg				0	1	0.00
	spi_device_ram_cfg	0.650s	3.920us	0	1	0.00
tpm_read				1	1	100.00
	spi_device_tpm_rw	1.240s	57.291us	1	1	100.00
tpm_write				1	1	100.00
	spi_device_tpm_rw	1.240s	57.291us	1	1	100.00
tpm_hw_reg				2	2	100.00
	spi_device_tpm_read_hw_reg	0.690s	10.841us	1	1	100.00
	spi_device_tpm_sts_read	0.680s	14.044us	1	1	100.00
tpm_fully_random_case				1	1	100.00
	spi_device_tpm_all	20.790s	9410.107us	1	1	100.00
pass_cmd_filtering				2	2	100.00
	spi_device_pass_cmd_filtering	2.180s	997.171us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
pass_addr_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	3.870s	1665.187us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
pass_payload_translation				2	2	100.00
	spi_device_pass_addr_payload_swap	3.870s	1665.187us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
cmd_info_slots				1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
cmd_read_status				2	2	100.00
	spi_device_intercept	23.480s	7077.262us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
cmd_read_jedec				2	2	100.00
	spi_device_intercept	23.480s	7077.262us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
cmd_read_sfdp				2	2	100.00
	spi_device_intercept	23.480s	7077.262us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
cmd_fast_read				2	2	100.00
	spi_device_intercept	23.480s	7077.262us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
cmd_read_pipeline				2	2	100.00
	spi_device_intercept	23.480s	7077.262us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
flash_cmd_upload				1	1	100.00
	spi_device_upload	5.340s	559.130us	1	1	100.00
mailbox_command				1	1	100.00
	spi_device_mailbox	6.760s	338.196us	1	1	100.00
mailbox_cross_outside_command				1	1	100.00
	spi_device_mailbox	6.760s	338.196us	1	1	100.00
mailbox_cross_inside_command				1	1	100.00
	spi_device_mailbox	6.760s	338.196us	1	1	100.00
cmd_read_buffer				2	2	100.00
	spi_device_flash_mode	13.430s	2273.322us	1	1	100.00
	spi_device_read_buffer_direct	5.350s	654.135us	1	1	100.00
cmd_dummy_cycle				2	2	100.00
	spi_device_mailbox	6.760s	338.196us	1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
quad_spi				1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
dual_spi				1	1	100.00
	spi_device_flash_all	88.340s	76643.184us	1	1	100.00
4b_3b_feature				1	1	100.00
	spi_device_cfg_cmd	1.690s	53.558us	1	1	100.00
write_enable_disable				1	1	100.00
	spi_device_cfg_cmd	1.690s	53.558us	1	1	100.00
TPM_with_flash_or_passthrough_mode				1	1	100.00
	spi_device_flash_and_tpm	22.660s	2741.173us	1	1	100.00
tpm_and_flash_trans_with_min_inactive_time				1	1	100.00
	spi_device_flash_and_tpm_min_idle	31.830s	17793.144us	1	1	100.00
stress_all				1	1	100.00
	spi_device_stress_all	21.160s	19276.616us	1	1	100.00
alert_test				1	1	100.00
	spi_device_alert_test	0.810s	20.795us	1	1	100.00
intr_test				1	1	100.00
	spi_device_intr_test	1.000s	12.449us	1	1	100.00
tl_d_oob_addr_access				1	1	100.00
	spi_device_tl_errors	1.880s	330.075us	1	1	100.00
tl_d_illegal_access				1	1	100.00
	spi_device_tl_errors	1.880s	330.075us	1	1	100.00
tl_d_outstanding_access				4	4	100.00
	spi_device_csr_hw_reset	0.880s	76.887us	1	1	100.00
	spi_device_csr_rw	1.620s	158.366us	1	1	100.00
	spi_device_csr_aliasing	10.630s	2840.314us	1	1	100.00
	spi_device_same_csr_outstanding	1.570s	74.277us	1	1	100.00
tl_d_partial_access				4	4	100.00
	spi_device_csr_hw_reset	0.880s	76.887us	1	1	100.00
	spi_device_csr_rw	1.620s	158.366us	1	1	100.00
	spi_device_csr_aliasing	10.630s	2840.314us	1	1	100.00
	spi_device_same_csr_outstanding	1.570s	74.277us	1	1	100.00

V2S

3/3 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
tl_intg_err				2	2	100.00
	spi_device_tl_intg_err	15.420s	3521.168us	1	1	100.00
	spi_device_sec_cm	0.990s	301.455us	1	1	100.00
sec_cm_bus_integrity				1	1	100.00
	spi_device_tl_intg_err	15.420s	3521.168us	1	1	100.00

unmapped

1/1 passed

100.00 %

Testpoint	Test	Max Runtime	Sim Time	Pass	Total	%
Unmapped				1	1	100.00
	spi_device_flash_mode_ignore_cmds	12.250s	3818.021us	1	1	100.00

Error Messages

	Test	seed	line	log context
UVM_ERROR (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[*])
	spi_device_mem_parity	96944826730176514023525513639533859427840582676682289463847200771907779812124	73	UVM_ERROR @ 6834117 ps: (uvm_hdl_vcs.c:1035) [UVM/DPI/HDL_SET] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[3]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name UVM_ERROR @ 6834117 ps: (spi_device_mem_parity_vseq.sv:44) [uvm_test_top.env.virtual_sequencer.spi_device_mem_parity_vseq] Check failed (uvm_hdl_read(egress_path, mem_data)) UVM_ERROR @ 6834117 ps: (uvm_hdl_vcs.c:1185) [UVM/DPI/HDL_DEPOSIT] set: unable to locate hdl path (tb.dut.u_spid_dpram.gen_ram2p.u_memory_2p.u_mem.mem[899]) Either the name is incorrect, or you may not have PLI/ACC visibility to that name
UVM_ERROR (spi_device_ram_cfg_vseq.sv:27) [spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (* [] vs [*])
	spi_device_ram_cfg	20533696507820185117296634231912017323079220267377864889165175369950219425891	73	UVM_ERROR @ 1630084 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x5f8b0f [10111111000101100001111] vs 0x0 [0]) UVM_ERROR @ 1719084 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x38a00a [1110001010000000001010] vs 0x0 [0]) UVM_ERROR @ 1764084 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x48282e [10010000010100000101110] vs 0x0 [0]) UVM_ERROR @ 1802084 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0x2828d4 [1010000010100011010100] vs 0x0 [0]) UVM_ERROR @ 1863084 ps: (spi_device_ram_cfg_vseq.sv:27) [uvm_test_top.env.virtual_sequencer.spi_device_ram_cfg_vseq] Check failed src_ram_cfg === egress_ram_cfg (0xeaf4a4 [111010101111010010100100] vs 0x0 [0])