Simulation Results: aes

 
11/12/2025 16:10:21 sha: 9c781e9 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 88.00 %
  • code
  • 87.21 %
  • assert
  • 97.75 %
  • func
  • 79.04 %
  • block
  • 88.99 %
  • line
  • 91.51 %
  • branch
  • 78.40 %
  • toggle
  • 97.99 %
  • FSM
  • 80.95 %
Validation stages
V1
100.00%
V2
100.00%
V2S
100.00%
V3
0.00%
Testpoint Test Max Runtime Sim Time Pass Total %
wake_up 1 1 100.00
aes_wake_up 3.000s 192.232us 1 1 100.00
smoke 1 1 100.00
aes_smoke 3.000s 138.739us 1 1 100.00
csr_hw_reset 1 1 100.00
aes_csr_hw_reset 2.000s 61.390us 1 1 100.00
csr_rw 1 1 100.00
aes_csr_rw 2.000s 53.477us 1 1 100.00
csr_bit_bash 1 1 100.00
aes_csr_bit_bash 9.000s 2478.159us 1 1 100.00
csr_aliasing 1 1 100.00
aes_csr_aliasing 5.000s 145.023us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
aes_csr_mem_rw_with_rand_reset 3.000s 73.797us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
aes_csr_rw 2.000s 53.477us 1 1 100.00
aes_csr_aliasing 5.000s 145.023us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
algorithm 3 3 100.00
aes_smoke 3.000s 138.739us 1 1 100.00
aes_config_error 3.000s 82.240us 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
key_length 3 3 100.00
aes_smoke 3.000s 138.739us 1 1 100.00
aes_config_error 3.000s 82.240us 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
back2back 2 2 100.00
aes_stress 2.000s 151.259us 1 1 100.00
aes_b2b 2.000s 109.165us 1 1 100.00
backpressure 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
multi_message 4 4 100.00
aes_smoke 3.000s 138.739us 1 1 100.00
aes_config_error 3.000s 82.240us 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
aes_alert_reset 2.000s 187.632us 1 1 100.00
failure_test 3 3 100.00
aes_man_cfg_err 3.000s 99.987us 1 1 100.00
aes_config_error 3.000s 82.240us 1 1 100.00
aes_alert_reset 2.000s 187.632us 1 1 100.00
trigger_clear_test 1 1 100.00
aes_clear 3.000s 142.067us 1 1 100.00
nist_test_vectors 1 1 100.00
aes_nist_vectors 4.000s 952.267us 1 1 100.00
reset_recovery 1 1 100.00
aes_alert_reset 2.000s 187.632us 1 1 100.00
stress 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
sideload 2 2 100.00
aes_stress 2.000s 151.259us 1 1 100.00
aes_sideload 3.000s 85.720us 1 1 100.00
deinitialization 1 1 100.00
aes_deinit 2.000s 92.506us 1 1 100.00
stress_all 1 1 100.00
aes_stress_all 21.000s 3776.180us 1 1 100.00
alert_test 1 1 100.00
aes_alert_test 2.000s 58.683us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
aes_tl_errors 2.000s 162.044us 1 1 100.00
tl_d_illegal_access 1 1 100.00
aes_tl_errors 2.000s 162.044us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
aes_csr_hw_reset 2.000s 61.390us 1 1 100.00
aes_csr_rw 2.000s 53.477us 1 1 100.00
aes_csr_aliasing 5.000s 145.023us 1 1 100.00
aes_same_csr_outstanding 8.000s 150.537us 1 1 100.00
tl_d_partial_access 4 4 100.00
aes_csr_hw_reset 2.000s 61.390us 1 1 100.00
aes_csr_rw 2.000s 53.477us 1 1 100.00
aes_csr_aliasing 5.000s 145.023us 1 1 100.00
aes_same_csr_outstanding 8.000s 150.537us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
reseeding 1 1 100.00
aes_reseed 2.000s 67.237us 1 1 100.00
fault_inject 3 3 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
shadow_reg_update_error 1 1 100.00
aes_shadow_reg_errors 2.000s 81.471us 1 1 100.00
shadow_reg_read_clear_staged_value 1 1 100.00
aes_shadow_reg_errors 2.000s 81.471us 1 1 100.00
shadow_reg_storage_error 1 1 100.00
aes_shadow_reg_errors 2.000s 81.471us 1 1 100.00
shadowed_reset_glitch 1 1 100.00
aes_shadow_reg_errors 2.000s 81.471us 1 1 100.00
shadow_reg_update_error_with_csr_rw 1 1 100.00
aes_shadow_reg_errors_with_csr_rw 3.000s 1041.802us 1 1 100.00
tl_intg_err 2 2 100.00
aes_tl_intg_err 3.000s 240.359us 1 1 100.00
aes_sec_cm 4.000s 2111.067us 1 1 100.00
sec_cm_bus_integrity 1 1 100.00
aes_tl_intg_err 3.000s 240.359us 1 1 100.00
sec_cm_lc_escalate_en_intersig_mubi 1 1 100.00
aes_alert_reset 2.000s 187.632us 1 1 100.00
sec_cm_main_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 81.471us 1 1 100.00
sec_cm_gcm_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 81.471us 1 1 100.00
sec_cm_main_config_sparse 4 4 100.00
aes_smoke 3.000s 138.739us 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
aes_alert_reset 2.000s 187.632us 1 1 100.00
aes_core_fi 2.000s 136.128us 1 1 100.00
sec_cm_gcm_config_sparse 2 2 100.00
aes_config_error 3.000s 82.240us 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
sec_cm_aux_config_shadow 1 1 100.00
aes_shadow_reg_errors 2.000s 81.471us 1 1 100.00
sec_cm_aux_config_regwen 2 2 100.00
aes_readability 2.000s 54.892us 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
sec_cm_key_sideload 2 2 100.00
aes_stress 2.000s 151.259us 1 1 100.00
aes_sideload 3.000s 85.720us 1 1 100.00
sec_cm_key_sw_unreadable 1 1 100.00
aes_readability 2.000s 54.892us 1 1 100.00
sec_cm_data_reg_sw_unreadable 1 1 100.00
aes_readability 2.000s 54.892us 1 1 100.00
sec_cm_key_sec_wipe 1 1 100.00
aes_readability 2.000s 54.892us 1 1 100.00
sec_cm_iv_config_sec_wipe 1 1 100.00
aes_readability 2.000s 54.892us 1 1 100.00
sec_cm_data_reg_sec_wipe 1 1 100.00
aes_readability 2.000s 54.892us 1 1 100.00
sec_cm_data_reg_key_sca 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
sec_cm_key_masking 1 1 100.00
aes_stress 2.000s 151.259us 1 1 100.00
sec_cm_main_fsm_sparse 1 1 100.00
aes_fi 2.000s 158.977us 1 1 100.00
sec_cm_main_fsm_redun 4 4 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
aes_ctr_fi 2.000s 85.580us 1 1 100.00
sec_cm_cipher_fsm_sparse 1 1 100.00
aes_fi 2.000s 158.977us 1 1 100.00
sec_cm_cipher_fsm_redun 3 3 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
sec_cm_cipher_ctr_redun 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
sec_cm_ctr_fsm_sparse 1 1 100.00
aes_fi 2.000s 158.977us 1 1 100.00
sec_cm_ctr_fsm_redun 3 3 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_ctr_fi 2.000s 85.580us 1 1 100.00
sec_cm_ctrl_sparse 4 4 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
aes_ctr_fi 2.000s 85.580us 1 1 100.00
sec_cm_main_fsm_global_esc 1 1 100.00
aes_alert_reset 2.000s 187.632us 1 1 100.00
sec_cm_main_fsm_local_esc 4 4 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
aes_ctr_fi 2.000s 85.580us 1 1 100.00
sec_cm_cipher_fsm_local_esc 4 4 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
aes_ctr_fi 2.000s 85.580us 1 1 100.00
sec_cm_ctr_fsm_local_esc 3 3 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_ctr_fi 2.000s 85.580us 1 1 100.00
sec_cm_data_reg_local_esc 3 3 100.00
aes_fi 2.000s 158.977us 1 1 100.00
aes_control_fi 2.000s 65.894us 1 1 100.00
aes_cipher_fi 2.000s 86.161us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
stress_all_with_rand_reset 0 1 0.00
aes_stress_all_with_rand_reset 10.000s 256.483us 0 1 0.00

Error Messages

   Test seed line log context
UVM_ERROR (uvm_sequencer_base.svh:757) sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'sequencer' for sequence 'sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
aes_stress_all_with_rand_reset 55919552846734093953371726095775555429556772877920499774704583341620407099691 760
UVM_ERROR @ 256483096 ps: (uvm_sequencer_base.svh:757) uvm_test_top.env.keymgr_sideload_agent.sequencer [SEQREQZMB] The task responsible for requesting a wait_for_grant on sequencer 'uvm_test_top.env.keymgr_sideload_agent.sequencer' for sequence 'uvm_test_top.env.virtual_sequencer.aes_stress_vseq.sideload_seq' has been killed, to avoid a deadlock the sequence will be removed from the arbitration queues
UVM_INFO @ 256483096 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---