Simulation Results: mbx

 
11/12/2025 16:10:21 sha: 9c781e9 json Branch: master Tool: xcelium [unknown]
Coverage statistics
  • Total
  • 90.90 %
  • code
  • 90.33 %
  • assert
  • 96.81 %
  • func
  • 85.55 %
  • block
  • 95.80 %
  • line
  • 95.40 %
  • branch
  • 89.55 %
  • toggle
  • 86.04 %
Validation stages
V1
100.00%
V2
93.75%
V2S
100.00%
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_smoke 1 1 100.00
mbx_smoke 48.000s 9245.965us 1 1 100.00
csr_hw_reset 1 1 100.00
mbx_csr_hw_reset 2.000s 13.679us 1 1 100.00
csr_rw 1 1 100.00
mbx_csr_rw 1.000s 64.438us 1 1 100.00
csr_bit_bash 1 1 100.00
mbx_csr_bit_bash 3.000s 1304.687us 1 1 100.00
csr_aliasing 1 1 100.00
mbx_csr_aliasing 1.000s 39.133us 1 1 100.00
csr_mem_rw_with_rand_reset 1 1 100.00
mbx_csr_mem_rw_with_rand_reset 2.000s 128.388us 1 1 100.00
regwen_csr_and_corresponding_lockable_csr 2 2 100.00
mbx_csr_rw 1.000s 64.438us 1 1 100.00
mbx_csr_aliasing 1.000s 39.133us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
mbx_stress 0 1 0.00
mbx_stress 3.000s 130.804us 0 1 0.00
mbx_max_activity 1 1 100.00
mbx_stress_zero_delays 42.000s 2427.816us 1 1 100.00
mbx_imbx_oob 1 1 100.00
mbx_imbx_oob 25.000s 2882.911us 1 1 100.00
mbx_doe_intr_msg 1 1 100.00
mbx_doe_intr_msg 18.000s 4436.697us 1 1 100.00
alert_test 1 1 100.00
mbx_alert_test 1.000s 17.964us 1 1 100.00
intr_test 1 1 100.00
mbx_intr_test 2.000s 39.480us 1 1 100.00
tl_d_oob_addr_access 1 1 100.00
mbx_tl_errors 4.000s 541.900us 1 1 100.00
tl_d_illegal_access 1 1 100.00
mbx_tl_errors 4.000s 541.900us 1 1 100.00
tl_d_outstanding_access 4 4 100.00
mbx_csr_hw_reset 2.000s 13.679us 1 1 100.00
mbx_csr_rw 1.000s 64.438us 1 1 100.00
mbx_csr_aliasing 1.000s 39.133us 1 1 100.00
mbx_same_csr_outstanding 2.000s 44.195us 1 1 100.00
tl_d_partial_access 4 4 100.00
mbx_csr_hw_reset 2.000s 13.679us 1 1 100.00
mbx_csr_rw 1.000s 64.438us 1 1 100.00
mbx_csr_aliasing 1.000s 39.133us 1 1 100.00
mbx_same_csr_outstanding 2.000s 44.195us 1 1 100.00
Testpoint Test Max Runtime Sim Time Pass Total %
tl_intg_err 2 2 100.00
mbx_sec_cm 1.000s 12.991us 1 1 100.00
mbx_tl_intg_err 3.000s 1767.548us 1 1 100.00

Error Messages

   Test seed line log context
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/mbx-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_mbx_*/rtl/mbx_ombx.sv,287): Assertion ReadyAssertedWhenRead_A has failed
mbx_stress 23110513629966223356182987443539457585105435297331338136368283291315697341136 110
xmsim: *E,ASRTST (/nightly/current_run/scratch/master/mbx-sim-xcelium/default/fusesoc-work/src/lowrisc_ip_mbx_0.1/rtl/mbx_ombx.sv,287): (time 130804126 PS) Assertion tb.dut.u_ombx.ReadyAssertedWhenRead_A has failed
UVM_ERROR @ 130804126 ps: (mbx_ombx.sv:287) [ASSERT FAILED] ReadyAssertedWhenRead_A
UVM_INFO @ 130804126 ps: (uvm_report_catcher.svh:705) [UVM/REPORT/CATCHER]
--- UVM Report catcher Summary ---